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A Fault-Tolerant Design Of Crossbar And Research Of Congestion Control In Network-on-Chip

Posted on:2018-11-16Degree:MasterType:Thesis
Country:ChinaCandidate:J DaFull Text:PDF
GTID:2348330542492639Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
Due to the development of the integrated circuit,Network on Chip has become the mainstream design scheme of multi processor system-on-chip.However,the characteristics size is decreasing gradually and the network complexity is increasing.Crossbar in the router is prone to failure,and the network congestion problem also becomes serious,which will make the overall performance of the system significantly reduced.For these two problems,different solutions are presented in this thesis.The first one is to design a fine-grained fault-tolerant architecture for Crossbar failure in the router.This architecture can ensure that the system performance will not drop when the failure rate is relatively large.The second one problem is network congestion.When network congestion is serious,we adopt the mixed architecture which combining with Network on Chip and wireless technology to reduce the network congestion.However,this architecture can't avoid wireless node congestion problem.In order to solve effectively this problem,we put forward an adaptive mechanism for switch allocation,which can reduce the overall network congestion eventually.The detailed design is as follows:(1)This thesis considers faults of Crossbar internal component including Demultiplexers,internal links and Multiplexers,then by adding a fault tolerant unit to tolerate Demultiplexers and internal links failure.The diversity of fault-tolerant path can be implemented by a fault tolerant unit.In addition,adding an additional Multiplexer effectively tolerates Multiplexers failure in the crossbar.When Crossbar failure rate is high,this design does not increase data transmission delay in the critical path and also ensure the network throughput won't decline immediately.(2)This thesis designs an adaptive mechanism for switch allocation which mainly includes two stages of arbitration logic.Every real-time request is authorized according to the congestion information in each stage.In addition,this mechanism has two allocation algorithms for two stages which can make arbitration judgment in real time according to the network congestion status,and area overhead is small.Finally a new WRRA arbitrator is proposed in the second stage,while the highest priority can be granted to requests from wireless port according to congestion information.This mechanism improves the network throughput and reduces average latency.
Keywords/Search Tags:Network on Chip, Crossbar, fault-tolerance, wireless, congestion
PDF Full Text Request
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