Design And Verification Of Time Synchronization Module In FC Node Chip

Fibre Channel is promising for avionic network equipment that need high level of interaction,because of its high transmission rate,low delay,high reliability and other excellent features.A fibre channel network was jointly built by a fibre Channel node machine and a Fiber Channel switch that used in the avionics environment for data communication between such devices as processors,cockpit displays,sensors,etc.The accuracy of time synchronization between multiple nodes is of great significance to the real-time and correctness of the network system,the troubleshooting between different devices,the task scheduling and so on.This study is focused on design and verification of a fiber channel node machine for avionics system So C chip to complete the time synchronization module.In the early stage of the design,the basic knowledge of Fiber Channel technology and time synchronization technology was studied.Meanwhile,the topology,hierarchical protocol and standard frame format of Fiber Channel technology were analyzed.This thesis is about the time synchronization method commonly used in Ethernet.It also includes the analysis and comparison of the fiber channel time synchronization mechanism based on link extension service frame and time synchronization primitive.The study provides theoretical support for the design and verification of time synchronization module in Fiber Channel node chip.Based on the concrete application requirements and chip architecture of the Fiber Channel node chip,the design scheme of the time synchronization system was discussed,the sub-module was developed.The Verilog hardware description language was used to design the FC Time synchronization primitive transceiver module.The sending part can implement the automatic encapsulation of the RTC information into the time synchronization primitive and insert it in the appropriate position in the frame gap.The receiving part can implement the automatic detection and RTC information of the time synchronization primitive in the FC link data.Time synchronization control module was also developed to improve the synchronization accuracy by achieving the synchronization skip detection and transmission delay compensation.The on-board time synchronization module translated the RTC information based on the RS485 bus transceiver function,aswell as the board multi-time source conflict detection.After the initial design of RTL,verification was performed,which including the development of the relevant bus function model.The virtual verification platform at module-level and system-level based on the directional verification method was also built.Based on the function,a testcase was developed which include the multi-mode basic time synchronization function,time synchronization fault scene,time synchronization accuracy test.Finally,the prototype verification based on the FPGA platform and the gate-level netlist simulation were performed.Through the iterative design and verification,all the verification items were tested to prove the correctness of the design.The time synchronization system can support five configurable synchronization roles,synchronization accuracy to microseconds.It satisfies the requirement of time synchronization mode and synchronization precision in hybrid fiber channel network in hybrid topology link.