The Simulation And Verification Of Fibre Channel Controller Based On SoPC

With the development of technique and design capacity, to satisfy the market need for costs, functions and power consumption requirements in embedded system field, using SoPC(System on a Programmable Chip) technology to integrate microprocessors, IP(Intellectual Property) core, memories ,and other interfaces in a single programmable chip, has become IC design and embedded systems development trends. Fiber Channel protocol has high speed, long transmission distance and scalability advantages in storage areas ,and occupies an important position in storage area. Using SoPC technology to implement Fiber Channel controller can effectively enable the SoPC advantages in hardware and software customization and expansion of the system. As the increasing of integration and device structure complexity, the verification of the SoPC system has become increasingly complex, and increasingly important.The hardware of Fibre Channel controller integrates NIOS II processor, DDR SDRAM controller, Flash controller, timer, UART , JTAG and FC user logic through Avalon Fabric bus. The simulation and verification of Fiber Channel controller hardware includes three levers: module level, IP lever, and system level. The modules verification of FC IP Core is to guarantee 90% of the errors can be resolved at an early period ; The verification of FC IP Core is not only guarantee the realization of FC protocol, but also guarantee the reusability and integration of IP core; The Fiber Channel controller system-level verification can resolve the conflicts between IP cores and also provide a hardware and software co-design verification development platform. Throughout the simulation process, the RTL simulation, gate-level netlist simulation, timing simulation and static timing analysis are all used. In the testbech, the use of Bus Functional Model simplifies the interaction of verification stimulus, the use of ABV(Assertion Based Verification) facilitates the operation of process monitor and result check, meanwhile, PLI interface also improve abstraction capacity of system stimulus and detection .The functional correctness and performance assessment of the Verification platform proved that the verification schedule of fiber channel controller is feasible and creditable.