Video Decoder Optimization Solution Based On Frame Buffer Compression Technology

The diversity of applications and the high-definition trends pose a huge challenge to video compression technologies.To this end,a joint video codecs team had been set up by the VCEG and MPEG group to develop new generation video codecs standard,and the H.265/HEVC standard had been released officially in 2013.The video compression ratio are doubled over the previous generation standard,greatly reducing the bandwidth pressure in the video transmission process.However,due to the use of more complex coding algorithm,the amount of calculation in the decoding process is increased significantly.In particular,in the inter-frame decoding proc,frequent data exchange consumes a great amount of system bus bandwidth.In this paper,the Frame Buffer Compression Technique is added to the traditional decoder structure to alleviate high bus bandwidth pressure due to frequent data exchange between the decoder and memory during decoding ultra high definition videos.The Frame Buffer Compression Technique offers a lossless compression with average compression rate of 50%.In this paper,the Frame Buffer Compression Technique is applied to the inter-frame decoding process.In the decoding process,the reference frame is compressed and rewritten into memory.When the decoder needs to use the reference frame,the compressed data is retrieved and restored.Since the data through the bus is compressed,it can greatly save bus bandwidth.In this paper,the decoder system architecture with the frame buffer compression and the sub module have been designed.Several working programs are designed for each module under the same sub module function principle.C language is the main implementing language for simulation and evaluation of the following sub module programs:1.The working principle of memory and the bus is analyzed and several different storage schemes by C language is designed.Information of inter frame reference block is used to evaluate each scheme.Storage scheme that improves memory efficiency and saves bus bandwidth are proposed.The test shows that the number of memory cross line times is reduced more than 90% comparing to the traditional way with the image storage in 16x32 pixel units.In addition,when the Frame Buffer Compression Technique works in Half Block Mode,the bandwidth can be saved 4% comparing to Compact Mode.2.A solution based on the edge expansion operations is proposed to resolve the conflict of The Frame Buffer Compression Technique and the parallel processing technique which is employed in the H.265/HEVC standard.The way of expansion is copy the nearest pixel to the left and up 8 pixels each,then respectively expand a few pixels to the right and down make the image resolution an integer multiple of 16×8.The delay of the parallel processing is solved increased by 1% of the amount of data.3.FIFO modules are used to store operation command and Head Cache module is used to prefetch coding head files.The combination of these solves the problem of the multiple application for the bus due to new Technique.The turtle tool in Python is used to visualize the order of the reference frame.Different Head Cache replacement strategies are compared and the capacity of cache to satisfy performance is determined.4.Body Cache module is added to further save bus bandwidth.Different number fetching plans are compared in their hitting rate and bandwidth performance.The capacity and prefetched size of the Body Cache are determined.5.The new structures with optimal design sub model are made to identify number of decoder modules that is needed for smooth operation of the new system.The old and new structures are compared to evaluate overall bus bandwidth saving.The result shows that the new solution saves the half amount of bandwidth compared to traditional solution,whose performance is improved significantly.