Research On The Cache Replacement Strategy For MLC STT-RAM Memory Energy Consumption

In recent years,with the emergence of data intensive applications,the demand for highdensity and low-power memory becomes more and more urgent.MLC STT-RAM(MultiLevel Cell Spin Transfer Torque RAM)is expected to replace DRAM(Dynamic Random Access Memory)as the next generation memory of various new Io T devices due to its high storage density and low static power consumption.However,the traditional cache replacement strategy does not consider the asymmetric high write energy consumption of MLC STT-RAM,which may lead to high memory write energy consumption.To solve these problems,this paper designs a LLC(Last Level Cache)replacement strategy LWE(Least Write Energy)to reduce the memory write energy consumption of MLC STT-RAM.Firstly,the memory data pattern is analyzed,and it is found that the memory storage unit contains a large number of '00' units.Based on this,a memory write back energy estimation strategy is proposed.By comparing the difference between all data units of each cache block in the target cache set and the ‘00' unit,the memory write back energy consumption when each cache block is eliminated is estimated.Then,a multi index comprehensive evaluation method is proposed.According to the access distance,access frequency and estimated write back energy consumption of cache blocks,the priority of cache block elimination is comprehensively evaluated,and the cache block with the highest priority is selected as the target elimination block to avoid eliminating the cache block with high write back energy consumption from LLC to memory.Finally,a dynamic adjustment strategy of index weight is proposed.The cache blocks in the target cache set are sorted according to the access distance,access frequency and write back energy consumption,and the ranking position of each cache block is obtained.According to the ranking position of the cache block,the weight of each index is determined,so as to realize the dynamic tradeoff under different loads and obtain better comprehensive evaluation performance.On the memory simulation platform built by Gem5 and NVMain,eight applications from the SPEC CPU2006 benchmark are used as a working set to evaluate the proposed cache replacement strategy LWE.Compared with LRU,the average write energy consumption is reduced by 38.9%,and the average LLC miss rate is reduced by 12.6%.Compared with LFU,the average write energy consumption is reduced by 32.1%,and the average LLC miss rate is reduced by 25.8%.The evaluation results show that LWE strategy can not only reduce the memory write energy consumption,but also improve the system performance.