Design Of Multi-level Cache Replacement Strategy In Multi-Core Processors

Cache is an important technology for increasing the speed of memory access in high-performance processors,and its impact on processor performance is critical.This thesis mainly focuses on the multi-core processor based on the inclusive cache structure.The lowest level cache of multi-core sharing is not clear about the use of the upper level cache,which leads to the lower level cache and invalidates the useful cacheline of the upper level.The LRU replacement strategy sends the locality information of the upper-level cache to the lower-level cache.When cacheline in the the lower-level cache is replaced,the local-level information of the upper-level cache and the local-level cache is replaced,to avoid the above-mentioned errors and invalidate the useful data of the upper-level cache.Thereby improving processor execution efficiency and overall performance.Based on the above theory,the GEM5 processor simulator is used as the design and test platform to modify the code of the replacement strategy of the LLC(Last Level Cache)in the cache model.The specific method is mainly to add the upperAccess flag bit to the shared LLC,the state of the upperAccess flag bit is the judgment basis of the upper-level cache data usage,and optimize the LLC cache line replace order when the LLC needs to make a replacement decision,to avoid the useful data of the upper cache being replaced,thus completing the induction of the superior LRU replacement strategy,and thereby reducing the number of times the inlusuve victim phenomenon of the L2 cache and the upper-level cache.Running the SPEC CPU2006 test sets in the simulator model to verify the sensing superior LRU replacement strategy.Taking the miss number and IPC of L2 and L3 cache as the entry point,the impact of the cache replacement strategy before and after optimization on the overall performance of the system is compared.The results of multiple test projects were compared,the IPC under the optimized single-core test increased by an average of 1.35%,and the L2 cache MPKI decreased by an average of 1.5%.After optimization,the IPC data of the multi-core test increased by 3.83% on average,and the L3 cache MPKI decreased by 5.0% on average.It is verified that the sensing superior LRU replacement strategy helps to solve the inclusive victim problem and improves the overall performance of the cache model.