The Research Of Fault Model Of Embedded System Based On The Dynamic Fault Tree

In design stage of the embedded system,the reliability assessment of the system architecture can show the system failure mode and identify the weak links in the system,which can provide a theoretical basis for the design of high-quality architecture in order to avoid errors and reduce maintenance costs.The failure model of embedded system can be descripted by the structural components and error attachment of the AADL(Architecture Analysis and Design Language).The study for embedded system failure model proposed in this thesis can be divided into three parts as follows:Firstly,this thesis studied the fault model of embedded system based on sequential fault.In order to solve the problem that there doesn't have the description of sequential fault in AADL,this thesis expands the error-model annex of AADL by adding the description of sequential fault,and proposes a new method which translate the extended fault model of AADL to the dynamic fault tree.This method makes the dynamic fault tree by analyzing the component and the fault propagation path.This method can solve the problem that the original AADL fault model can't fully reflect the fault of system sequential fault and realize the automatic generation of dynamic fault tree.Then,the verification method of dynamic fault tree based on the timing fault gate is studied.In this thesis,a dynamic fault tree verification method based on SBDD is proposed to solve the problem that there is invalid result in the analysis result using the SBDD(Sequential binary decision diagram),which can delete the invalid cut sets dynamically during the calculation.The method mainly includes two aspects: sorting method based on structured sorting method and dynamically optimizing algorithm based on SBDD generation algorithm.Experimental results show that this method can eliminate the invalid analysis result and improve the precision of the result.Finally,according to the above research,it designed and implemented the verification software of the embedded system fault model.In the design stage of the embedded system,the software can be used to verify the fault model of the embedded system,and to get the non-crossing cut set of the dynamic fault tree,which provides strong support for the improvement of the embedded system.The experimental results show the validity and practicability of the method from the extended AADL fault model to the dynamic fault tree transformation method and the dynamic fault tree verification method based on SBDD.