Designs Of A Configurable Delta-Sigma ADC For Digital Gyroscopes

Microelectromechanical systems(MEMS),as a cutting edge technology built on micro-nanotechnology,provide a new class of low-cost,low-power,high-reliability sensors.Among them,micro-mechanical gyroscopes used to measure angular velocity and angular displacement of objects are widely used in military field,automobile technology,industrial field and consumption field.In order to realize the digitization of the micro-mechanical gyro driver circuit and the detection circuit,it is necessary to design a high-performance analog-to-digital converter(ADC).Wherein,Delta-Sigma ADC can achieve low-speed,narrow-band,high-precision analog to digital conversion,it can be directly applied to the detection of high precision digital micromechanical gyro interface circuit.This paper is designed for digital gyro-configurable Delta-Sigma ADCs.The dual-channel programmable gain front-end(PGA)allows the reception of weak signals from the sensor.The SPI module can be used to communicate with the microprocessor.The on-chip registers allow control of the input channel and the gain so as to the filter cutoff frequency.PGA configurable gain ranges from 1 to 128,CIC filter extraction factor can be configured from 32 to 1024,Delta-Sigma ADC data update rate ranges from 20 SPS to 600 SPS.This paper first analyzes the working principle and architecture of Delta-Sigma ADC.A single-loop,fourth-order,1-bit quantized architecture Delta-Sigma modulator is designed using oversampling and noise shaping techniques.And with the use of input full feed forward topology and switching capacitor technology achieves the PGA function integrator and adder and a 1-bit comparator and DAC circuit.At the same time,the overload detection module is designed to ensure the stability of the modulator system.A cascade integrator comb filter(CIC)with sinc5 response is designed using digital filtering and extraction techniques,and the CIC digital decimation filter is implemented with a direct five-stage cascade structure.The SPI on-chip control register is defined including communications & mode filter selection & data register and the serial interface is designed and implemented.In addition,the system-level design of the modulator and the digital decimation filter is completed by MATLAB.The SIMULINK model of Delta-Sigma ADC considering non-ideal factors is established,and the structural parameters are scanned and the correctness of the system design is verified.Using the HHGrace035?mBCD350GE process full custom design Delta-Sigma ADC layout.When the amplitude of the input sinusoidal signal is-6dBFS,the gain is 1,the output data rate is 38 SPS,the sampling rate is 19.5kHz.The output noise spectrum of transistor-level simulation shows that the noise floor of the Delta-Sigma ADC is below-140 dB,harmonic distortion is below-130 dB,SINAD can reach 120.1dB,and ENOB can reach 20 bits.With the supply voltage of 5V,when the system is in the power-down mode,the power consumption is 4.998mW;when the system is in the normal mode,the power consumption is 9.047 mW.