Research And Implementation On Assistant Debugging And Testing Technology For Networked FPGA

The new emerging technologies such as NFV and SDN,need higher performance and flexibility requirements for network processing.Networked FPGA promotes the flexibility and extensibility of the network architecture,because it posses reconfigurable and easy-to-develop characteristics,when Networked FPGA deploies the FPGA directly in the network.However,its deployment and implementation in a real network environment is still facing some challenges.Among them,the lack of support for Networked FPGA in assistant debugging and testing technology is the critical issue to be resolved.Therefore,we propose ADT(Assistant Debugging and Testing Technology for Networked FPGA)in this paper.The main research works and innovations include:(1)Assistant debugging and testing system for Networked FPGA is designed,which is named ADT system.Based on deeply analyzing requirements for Networked FPGA during debugging and testing,the core idea and basic framework for ADT system is proposed.Furthermore,we emphatically analyze the signal and logic state monitoring techniques for Networked FPGA.(2)Software-defined signal monitoring mechanism is proposed,which is named SiMM(Monitoring Mechanism on Signal).It supports the definition of sets of signal monitoring specified by the software.SiMM implements the control and store action based on spill-over storage method,which reduces the internal storage space requirements of FPGA.SiMM introduces the control and filter technology based on crossbar structure,which enhances the flexibility of signal monitoring and reduces network bandwidth requirements for information transmission of signal monitoring.(3)Logic state monitoring mechanism based on finite-state is proposed,which is named FiMM(Monitoring Mechanism on Finite-state).It provides high-level monitoring view for Networked FPGA during debugging and testing stage.By defining HDL description of state machine specification,we realize the code abstraction in the logic process of Networked FPGA internal processing.Meanwhile,we implements finite-state monitoring packet compression based on TLV(Type-Length-Value),which reduces network bandwidth requirements of finite-state monitoring packet transmission.(4)Based on NetMagic08 network experiment platform,the prototype of ADT hardware system is implemented and evaluated.The results show that ADT hardware system can provide Networked FPGA with signal and logic state monitoring and proved the feasibility of ADT system.Its utilization of FPGA resource is relatively less and the monitoring performance is satisfiable.In summary,ADT system provides remote debugging and testing of the signal and logic state monitoring.And the feasibility is proved about deployment and implementation on Networked FPGA.The ADT system will have significant theoretical and engineering value.