Research And Design On ADC Used In Digital DC-DC

With the development of microelectronics technology,the demand for power supply of integrated circuits in electronic equipment is getting higher and higher,and the digital power management chip has become a hot spot for researchers.As a key circuit module,ADC determines the performance of output voltage in digital DC-DC,to meet the digital DC-DC's performance requirements,the research of the ADC is of great significance.Through the analysis of the proposed digital DC-DC performance index, according to its needs to quantify the narrow analog input range and high absolute accuracy of the characteristics, to achieve a window-type Flash ADC.Firstly,the structure of the traditional Flash ADC is analyzed. The design index and system structure of the ADC are determined according to the requirements of BUCK variable output digital DC-DC. In order to reduce the size of the circuit, the pre-amplifier operation will be used to effectively reduce the number of operational amplifiers in the system. Specter completed the design and simulation of windowed Flash ADCs including preamplifier circuits,feedback op amps, comparators and coding modules. By setting reasonable parameters and common mode input voltage, with 4bit ADC to achieve the input voltage change amplitude of 25.6mV, the minimum LSB 1.6mV absolute accuracy of the higher ADC.Taking into account the circuit may exist in the circuit will have a greater impact, in-depth study of the pre-amplifier circuit offset suppression. Using the Specter simulation to analyze the relationship between the substrate bias voltage and the threshold voltage of the MOS transistor, the op amp input pair is designed on a separate well, and when it is out of order, the resistor divider network is controlled with a digital signal, Method adjusts the relative substrate bias of the input to the tube until the input equivalent of the equivalent of the tube is equal and the adjustment correction is completed. A pre-amplifier with an offset voltage calibration is used in a designed Flash ADC to effectively suppress circuit misalignment.Using SMIC 180nm process, through the Spectre + matlab simulator for the entire window Flash ADC design simulation, and completed the Flash ADC layout design and post-simulation. The results show that the offset voltage is introduced at the input voltage of 3.3V and the sampling frequency is 15MHz, and then the offset voltage suppression method proposed in this paper is used. The simulation results show that the offset voltage is effectively reduced. The results show that the number of significant digits can reach 3.208-bit when the offset suppression circuit is not used, and the effective number of bits can reach 3.793-bit, SNDR is 24.592dB, and the ideal value is 25.84dB. It meets the ADC's needs.