Research Of SiGe BiCMOS Power Amplifier For TD-LTE Application

In recent years, the fourth generation mobile communication system(4G),the lastest wireless communication system,has developed rapidly.LTE technology is the long term evolution from 3G to 4G,including tow standards,TDD-LTE and FDD-LTE.In order to improve spectrum utilization and system capacity,the orthogonal frequency-division multiplexing multi-carrier modulation technique is adopted in TD-LTE.However,the nonlinear distortion becomes more serious.In radio frequency transceiver system,the power amplifier is the final stage of the transmitters. So its performance is closely related to the performance of the whole system.TD-LTE system has stricter requirement with power amplifier compared to previous communication systems. According to that, this paper designed a power amplifier for TD-LTE.This paper designed a two-stage differential amplifier for TD-LTE, which worked on the 38 band at 2.57-2.62 GHZ. This power amplifier includes a driver stage, a power stage and the matching circuit. The driver stage uses the stacked differential structure to expand the output power range, and improve the linearity. But the gain of this structure decreased, compared to the differential Cascode structure. So the power stage uses the bipolar stransistor for higher gain. Through the simulation in sorftware and compared with the similar design, this design gets good performance and meets the design requirements.The proposed power amplifier's schematic and layout are designed and simulated with Spectre RF tool from Cadence design systems based on 0.18 um SiGe BiCMOS technology. The simulated results show that: from 3.3V supply, the circuit simulation results are as follows: S11:-28~-12 dB, S22:-14~-11 dB, the power amplifier achieved good input impedance matching and output impedance matching; High power gain, Gain peaked at 32 dB; high Linearity, P1 dB is 29.54 dBm. The post simulation results as follows: S11 belows-10 dB, S22 belows-10 dB, Gain peaked at 31dB; P1 dB is 26 dBm. Respectively, the layout for the proposed mixer occupies an area of only 1.61851 mm2. And the K is almost bigger than 1 in the circuit simulation or the post simulation, the circuit is stable.