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Design And Implementation Of Physical Layer Of Tactical Data Link System Based On FPGA

Posted on:2018-12-20Degree:MasterType:Thesis
Country:ChinaCandidate:Y Y ChenFull Text:PDF
GTID:2348330518994853Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
In the modern battlefield environment, the importance of the tactical data link system has become increasingly prominent. The digital receiving and transmitting equipment of frequency hopping communication is basic to tactical data link system. The design and implementation scheme of digital transmitter and receiver determines the communication performance and anti-jamming performance of frequency hopping system.Based on the research of the frequency hopping communication system, this thesis puts forward that the frequency hopping transceiver hardware implementation scheme, designs the structure of the signal processing module, and can realize the function of each module and logic through RTL design based on FPGA. This thesis verifies the reliability and stability of the system as the frequency hopping transceiver of a tactical data link physical layer.First, the thesis analyzes the advantage and development of frequency hopping system and the main points of its hardware implementation. This thesis analyses the performance and functional requirements of tactical data link, puts forward the frequency hopping transceiver modules design and implementation of the scheme. Second,this thesis designs and implements the system of the physical layer transmitter and receiver and peripheral modules. This thesis designs and implements the hardware logic of the transmitter module such as spread spectrum modulation module, interpolation filter module, frequency hopping module. This thesis designs and implements the receiver module such as digital down conversion module, decimation filter module, demodulation module and spread spectrum module. This thesis outlines the functions and characteristics of each peripheral chip and data bus, designs and implements the control arithmetic and bus interface between the peripheral and FPGA. The hardware logic of the system control module is also designed and implemented, such as system clock management, reset and design for test.Finally, the thesis uses the logic analyzer, spectrum analyzer and other test equipments to verify the functions and the internal logic of each module.
Keywords/Search Tags:Frequency hopping communication, FPGA, receiver, transmitter, tactical data link
PDF Full Text Request
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