The Design And Implementation Of Maintenance Detection System Based On FPGA

Nowadays FPGA is used more and more widely in the field of application equipment.However, thers are not only opportunities, but also challenges which FPGA should faced with, such as performance, security and reliability.In this paper, I designed a maintenance detection system based on FPGA according to our laboratory's balise research task. The hardware circuitry of the maintenance detection system was completed using Altera's FPGA as the central processing chip. Moreover, I designed and implemented a series of processes from data detection to caching and then to the PC display on the maintenance detection system with the help of the software simulation and the actual on-board test methods. The main contents of this paper are as follows:1. To investigate the requirements of the maintenance detection system, to study the key technologies needed by the project, and to select chips. Finally I decided to use the Altera Company's EP3C55 as the central processing chip and the TI Company's TMS320F2807 Microcontroller Unit (MCU) as a control chip.The mechanism of dual computer processing data is added on the basis of traditional methods in order to enhance the reliability of the equipment. Two pieces of FPGA are used to process data simultaneously, and the running status of the two pieces of FPGA is monitored at the same time. Then a complete system design is formed by combining the log records and the maintenance test interface.2. To design and manufacture the hardware circuit of maintenance detection system. I made all the components by PCB packaging technology, completed the PCB board design of maintenance detection system, and achieved the hardware foundation of the system. The main schematic diagram and the complete PCB diagram of the maintenance detection system hardware are given in the paper.3. To design and write software code of the maintenance detection system.Firstly, requirement analysis about each crucial module of the balise device was carried out, and the key nodes information of each module in the system operation process was determined. Finally, the log record information and the data output of the maintenance test interface were determined. Moreover, the communication protocol between FPGA and MCU was designed, so was the communication protocol between MCU and host computer. Then, the software code was written according to the protocol.4. To detect the software program of the maintenance detection system combined with hardware circuit board. The on-board test and signal capture of hardware circuit were carried out by downloading the program to the FPGA. In this paper, the RTL circuit diagram of Verilog code is given, and the actual waveform of hardware circuit is captured. Then, we can do some analysis and draw conclusions from the results of PC display.