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The Design Of CMOS Active Pixel And The Study Of Image Lag

Posted on:2020-11-03Degree:MasterType:Thesis
Country:ChinaCandidate:R S WangFull Text:PDF
GTID:2518306518469244Subject:Microelectronics and Solid State Electronics
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In recent years,CMOS image sensors have been widely used in various imaging fields due to their low noise,high integration,and low cost.For CMOS image sensors,the performance of the pixel plays the most important role in the imaging quality of the sensor.Therefore,the pixel design and optimization are carried out for the quantum efficiency,full well capacity,dark current and charge transfer characteristics of the pixel.The charge spill back that affects image lag is mainly studied.In this paper,the CMOS image sensor is compatible with the high conversion gain mode of low-light imaging by adopting a six-transistor pixel structure,and the working principle of the pixel to achieve high and low conversion gain modes is analyzed.Based on the 0.18?m CMOS image sensor process platform,the photodiode of the finger shape structure is adopted,and the CMOS image sensor pixels are designed,simulated and optimized according to key performance parameters such as quantum efficiency,full well capacity,dark current and charge transfer efficiency.In particular,the charge spill back affecting the image lag is studied and analyzed.The physical model of charge spill back is built based on the theory of thermal electron emission and drift-diffusion,and successfully explains the effect of the transfer transistor gate voltage and the floating diffusion node reset voltage on the amount of charge spill back to photodiode region during charge transfer.Finally,the layout design and test results of the pixel are given.Based on the design and optimization of pixels in this paper,the pixel layout design of 2k×2k array size is completed.Under the condition of uniform illumination,the pixels of CMOS image sensor are tested.The test results show that the high and low conversion gains can reach 95.45?V/e-and 20.85?V respectively,the full well capacity is increased from 31474e-to 74696e-,and the charge transfer efficiency can be 100% through TCAD simulation,that is,zero image lag is achieved.
Keywords/Search Tags:CMOS active pixel, image lag, spill back effect, pinned photodiode(PPD)
PDF Full Text Request
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