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The Phase Locked Demodulation And Implementation In FPGA On Laser Vibration Measuring

Posted on:2015-08-31Degree:MasterType:Thesis
Country:ChinaCandidate:Q ZhangFull Text:PDF
GTID:2348330518470676Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
In the measurement of low frequency vibration, the measurement method of laser interference has higher sensitivity and practical applications, demodulation system is particularly important as the core part of demodulation system. This thesis combined the phase-locking function of Phase-Locked Loop (PLL) on the basis of original interference signal PGC demodulation algorithm, and put forward phase-locking demodulation algorithm.Firstly, this thesis introduced the basic principles of PLL, analysed it's main constitution and working principle, analysed and mathematical modeled each individual component of PLL, got the phase model of PLL, gave the conditions and features when it was in the locking state.Secondly, the thesis gave a general introduction on the laser vibrometer system, then derived two PGC demodulation algorithms of interference signal,contrasted the merits and demerits of the two algorithms. Analysed the latency that carrier signal of interference signal relative to reference signal when PGC demodulating, settled on that latency had seriously effect on demodulation, thereby put forward the idea of phase-locking compensated the phase displacement. Moreover, made further refinements to PGC demodulation algorithm based on ARCTAN, established the phase-locking demodulation principle used related to this thesis.Finally, designed and simulated major components of phase-locking Demodulation Algorithm independently, including: Number Controlled Oscillator(NCO)?CORDIC module used to compute the arc tangent and FIR low-pass filter by using Altera's FPGA development tool DSP Builder. Completed the overall design of phase-locked demodulation system.By theoretical derivation and model simulation, the phase-locking demodulation system had reached the preplanned function and could be further applied in practice.
Keywords/Search Tags:FPGA, NCO, CORDIC, FIR low-pass filter
PDF Full Text Request
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