Research On Erasure-in-Depth Key Technology Of Flash Memories

21st century has witnessed the profound influence of information technology on areas such as economy,military and culture.Information technology on one hand makes people feel convenient in daily life,while on the other hand suffers security problems.As a branch of information security,the security of memories gains increasingly high attention,especially after the proposal of smart home and intelligent city.In recent years,more and more researches have shown the existence of data remanence in memories,which means data still can be recovered even after erasure.This phenomenon will bring huge harmfulness to national security,business secret and individual privacy.Based on this background,this thesis has developed the research on erasure-in-depth for Flash memories.Firstly data remanence is analyzed thoroughly and the residual electrons on floating gate is found to be an important factor.Then device modelling is established considering the residual electrons.All data sequence within 9 bits are used to cover virgin flash cells in order to obtain their remanence value.After analysis of those remanence value,effective data sequences to eliminate data remanence are put forward.On the other side,a drain current readout circuit is designed to validate the effectiveness of the erasure-in-depth sequence proposed earlier.Considering the interface with readout circuit,a tape-out scheme for flash cells is proposed,which includes the design of a high voltage switch and a drain current guidance circuit.The drain current readout circuit employs a fully differential structure combining transimpedance amplifier stage and voltage amplifier stage to improve transimpedance gain and inhibit common mode noise.Finally,a mixed CMOS voltage reference with high precision is also designed in the thesis to provide a constant bias voltage.The drain current readout circuit and CMOS voltage reference is designed and simulated in 0.18?m standard CMOS technology.For the drain current readout circuit,its output range is from-2.974V~2.959 V,transimpedance gain is 7.4M?,equivalent input noise current is 0.035 nA,and its linearity is quite good.For CMOS voltage reference,the temperature drift is 12.7ppm/°C,power supply rejection ratio is-31.2dB,equivalent output noise voltage is 171?V.The effective data sequence for erasure-in-depth are PEPE and PEPEP(P for Program and E for Erase).