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Design Of RF Power Amplifier

Posted on:2017-05-30Degree:MasterType:Thesis
Country:ChinaCandidate:H B ZhangFull Text:PDF
GTID:2348330515963885Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
RF power amplifier plays a vital role in a wireless communication system.The power amplifier is the last block in a transmitter chain.It amplifies the signal to the target power and drives the antenna.It consumes the largest portion of the transmitter current consumption budget,and any power saving in this block will significantly improve the overall system efficiency.With the development of CMOS technology,its performance has been able to meet the design of power amplifier based on wireless local area network and radio frequency identification system.This paper introduces the background and current research of the power amplifier,and briefly describes the problem of CMOS process should pay attention to during the design of power amplifier.In order to meet the needs of wireless communication systems,the principle and pros and cons of power amplifier are introduced.Several linearization and enhanced efficiency technologies were introduced to improve the performance of the power amplifier.A 2.4GHz class AB power amplifier base on 0.18?m UMC CMOS process was presented in this paper for the WLAN applications.The diode linearization is joined which can effectively improve the linearity of the power amplifier.The tape-out has been carried out after the validation of the layout design.The post simulation results show that the output power is more than 20 dBm,power added efficiency is more than 20% under the 3.3V supply voltage.This power amplifier exhibits excellent stability in the frequency range of interest.A 915 MHz variable gain power amplifier base on 0.18?m UMC CMOS process presented in this paper for the UHF RFID systems application.Three parallel cascode structure is used in the driver stage to realize the variable gain,and cascode structure is also applied to the power cell.The tape-out has been carried out after the validation of the layout design.Post simulation results show that the power amplifier can be deliver a power gain of 9dB,21.2d B,25 dB and 25.8dB under the 1.8V and 3.3V supply voltage.The power amplifier output power of 21.47 dBm and the maximum power added efficiency of 29.6%.
Keywords/Search Tags:WLAN, Power amplifier, UHF RFID, CMOS process
PDF Full Text Request
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