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Design Of 24.2?29.5GHz Power Amplifier Based On 65nm CMOS Process

Posted on:2022-02-25Degree:MasterType:Thesis
Country:ChinaCandidate:X Z ZhouFull Text:PDF
GTID:2518306740493264Subject:Integrated circuit design
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With the rapid development of wireless communication technology,the application of millimeter-wave integrated circuits has become more and more extensive,and people have put forward higher and higher requirements for the performance of wireless communication products.As one of the core modules of the millimeter wave transmitter,the RF power amplifier has attracted widespread attention in the industry and academia.The design and research of RF power amplifiers based on low-cost and high-integration silicon-based technology has important theoretical and practical significance for promoting the development of wireless communication technology.This thesis takes the 5G millimeter wave radio frequency front-end chip project as the background,and carries out the research of 24.2?29.5GHz silicon-based power amplifier based on the 65 nm CMOS process.This thesis adopts the circuit structure of a two-stage common source amplifier based on cross-coupling capacitor neutralization technology to improve the stability,gain and swing of the amplifier.Through modeling analysis,inductances and transformers of different sizes and structures are compared,and on this basis,a transformer with side coupling structure and low coupling coefficient for wideband inter-stage matching,and a Barron with vertical coupling structure and high coupling coefficient for output impedance matching are designed.The circuit design,pre-simulation,layout design and layoutEM hybrid simulation of the RF power amplifier are carried out using Cadence,ADS and other software.The hybrid simulation results show that under the TT process corner and the power supply voltage of 1.2V,the gain S21 is greater than 23.4d B,and the input return loss S11 is less than-10.6d B in the 24.2?29.5GHz operating frequency band.At 27 GHz,the output 1d B compression point OP1 d B is 15.19 d Bm,the output third-order intercept point OIP3 is25.71 d Bm,and the power added efficiency is 25.99% when the output is saturated.The RF power amplifier designed in this paper meets the design index requirements and has been sent to tape out.After testing and verification,it can be applied to 5G millimeter wave RF front-end chips.
Keywords/Search Tags:power amplifier, on-chip transformer, modeling, CMOS process, capacitor neutralization, Millimeter wave
PDF Full Text Request
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