Font Size: a A A

Research And Design Of Key Circuit In Ultra Low Power Implantable Receiver

Posted on:2018-10-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y ZhouFull Text:PDF
GTID:2348330515485691Subject:Integrated circuit design
Abstract/Summary:PDF Full Text Request
The IEEE 802.15 working group promoted the standardization of short-range wireless communication formally approved the standard "IEEE 802.15.6" of short-range wireless network constructed by various sensors and devices configured around the human body in 2012.This communication method is called"BAN(Body Area Network)".Super-regenerative receiver architectures are suitable for use in the field of implantable chips due to its low power consumption.In this paper,a low-noise amplifier(LNA)and super-regenerative oscillator(SRO)are designed in super-regenerative receiver based on SMIC 0.18-?m CMOS process.The LNA is based on the source inductor negative feedback structure,using gmfT/ID to optimize the bias voltage of the LNA.The gm-boost technique is used to improve the gain of the LNA,and the CGD offset structure is used to improve the reverse isolation.The LNA in the case of low voltage,ultra-low power consumption to achieve a higher gain,while achieving very low noise figure and good linearity,to meet the application of implantable super-regenerative receiver requirements.The core structure of the super-regenerative oscillator is based on a complementary cross-coupled LC oscillator.In order to achieve ultra-low power consumption,the cross-coupled pair is biased in the sub-threshold region while ensuring the start-up time and output amplitude of the super regenerative oscillator.Cadence Spectre tools are used to complete the pre-simulation,layout design and the post-simulation.According to the results:The low noise amplifier designed in this paper can work with a supply voltage range of 0.9?1.1V,the power consumption can be as low as 233 ?W,the gain is up to 15.80 dB,the minimum noise figure is 3.742 dB,the minimum input 1-dB compression point is-18.0 dBm,and the minimum input 3rd-order intercept point is-9.4 dBm.The super-regenerative oscillator has an operating voltage of 1.1 V,a dynamic power consumption as low as 91 ?W.The oscillation waveform output amplitude is greater than 500 mV,and the starting time is 1.136 ?s.These post-simulation results of the LNA and the super-regenerative oscillator basically meet the requirements of design specifications and can be integrated into ultra-low power super-regenerative receiver chip.
Keywords/Search Tags:Implantable chip, Ultra Low Power, Low Noise Amplifier, Super Regenerative Oscillator
PDF Full Text Request
Related items