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Research And Design Of High Power Supply Rejection On-chip Power Supply System

Posted on:2018-09-21Degree:MasterType:Thesis
Country:ChinaCandidate:M HeFull Text:PDF
GTID:2348330515451792Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the development of CMOS technology and device size continues to shrink,the chip integration is getting higher and higher.A system on chip(SOC)often integrates analog,RF,digital and other modules.It raises the performance requirements for the power supply system.One of the challenges is that with the reduction of voltage and device size,power supply noise and cross coupling have a decisive influence on the performance of sensitive circuits.Therefore,this paper has studied and designed the power supply system with high power supply noise rejection ability.This paper takes two ways to improve the LDO(Low Dropout Regulator)output power supply rejection ratio:(1)to improve the LDO loop gain;(2)make the error amplifier output to follow the power fluctuations to ensure that the Gate-Source voltage of Power MOS stay unchanged,so that the LDO output does not change with the power fluctuations.Firstly,this paper selects two-stage error amplifier composed of NMOS input differential amplifier and PMOS common source amplifier to achieve high loop gain.Secondly,by using negative feedback,amplifier output impedance to the ground is much greater than to the power,so the amplifier output can get almost the same fluctuations of the power supply,and the gate-source voltage difference of the power MOS can be kept constant.In order to meet the design requirements of LDO,a bandgap reference with high power supply rejection and high-precision output is designed to provide the reference voltage for LDO.For the over-current risk of large-current power supply system,a foldback over current protection circuit is designed.It can accurately sample the output current and lock the current to threshold accuruately.It can effectively prevent the chip from getting burned by large current.The final circuit and layout design of this paper is based on 40 nm CMOS technology,including bandgap reference,LDO,overcurrent protection circuit and other key modules.At a power supply voltage of 1.9V(± 10%),the output voltage of the LDO is 1.1V and can operate stably wihtin 0-330 mA load range.It is worth noting that the LDO with different load current is always able to maintain power supply rejection better than 94 d B in DC and 20 dB in the whole frequency range.
Keywords/Search Tags:LDO, PSR, Large Current, Stability, Foldback Over Current Protection
PDF Full Text Request
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