Design And Implementation Of FC Switch Based On Time-Triggered Network

Due to higher and higher demand of features of high speed,high stability and real-time to network in aerospace,automotive electronics,transportation,medical equipment and other fields in recent years,time-triggered network has been widely researched and applied.This type of network achieves the optimization of transmission and processing of key data according to the features of data stream with assigning different time slots for different nodes,making the communicating procedures of this type of data attain the characteristics of very low time delay and high reliability and ensuring the ability of data processing of system totally.This technology is useful particularly in the application fields of fibre channel network and can promote the processing ability of this type of network under the circumstances of multiple nodes and large capacity of data stream.This thesis focuses on the design and inplementation of fibre channel switch based on time-triggered network.Firstly,The thesis introduces FC protocol used in the design of switch,including functions of every level of the protocol,structures of frame and flow control and so on.Next,the thesis introduces the design principles and approches of switch in terms of architectures and caching strategies.And then the thesis introduces the time-triggered network and several different clock synchronization approches.At last,the thesis describes the existing switch technology in the time-triggered network briefly.Next,the thesis puts forward the design schemes of switch and analyses it.And then,the thesis introduces every module of the logic design of switch in detail,including receiving module,switch level module and sending module.The receiving module implements the functions of data processing in the interface and selection of routes;the switch level module inplements the functions of searching the schedule table and switching towards different kinds of frames;the sending module implements the function of the ordered transmitting of frames from different routes.At last,the thesis compares the design schemes above with the primary design schemes.Finally the simulation and tests to the switch designed according to the above procedures are finished on the basis of testing schemes.Firstly,the function simulation is done using the testbench and the data for test designed in the software ModelSim.Secondly,the executive file used to be loaded into FPGA circuit board is generated by the procedures of synthesis and implementation on the development platform and loaded into the circuit board of switch.At last,the functional tests are finished in the environment constructed,and the numbers of frames received and sent and the internal time delays are cellected and analysed in real time by the management software of switch,and the performances of switch are estimated according to the expected goals and the results.