FPGA-Based Design And Implementation Of Baseband Waveform Generator

With the development of electronic information technology, the higher performance of stimulus signals, which has outstanding advantages such as adjustable frequency, flexible waveform and fast frequency switching speed etc., are required in modern wireless communications test field. In this thesis, an FPGA-based baseband signal generator has been designed and implemented for the RFIC test requirements in wireless communication system.According to the actual design requirements, the advantages and disadvantages of DDFS and DDWS technology were analyzed, and the DDWS waveform synthesis scheme based on SOPC system were determined. And the key techniques of increasing waveform memory depth and improving output waveform quality were studied. In increasing waveform memory depth, in order to save periodical waveform sequence of storage space, according to the principle of sequence waveform synthesis technology and the design characteristics of Altera FPGA platform, the thesis reasonable adjusted the DMA descriptor transmission way based on the DMA control mode to realize sequence waveform address control logic under the Nios II development environment. In improving output waveform quality, the thesis discussed the error source in the process of waveform synthesis and emphasized on the nonlinear DAC error. By using the method of digital pre-distortion, corresponding Gauss Function error model was established, and least squares was used to obtain the model corresponding coefficient. Finally, the relevant error was compensated in the digital domain.According to the test result, sequence waveform synthesis based on Nios II can realize a single storage waveform sequence to output repeatedly which proved the method improved waveform memory depth equivalently. In the case of sinusoidal input sequence, the actual test of system SNR was improved approximately 8 dB and SFDR was increased 6.12dB before and after the DAC nonlinear error compensation. For 64QAM modulation input signal, the system EVM is about 1.75%; Results show that the project design of baseband signal generator achieves the requirements of the system requirement.