Design And Implementation Of Hot-Carrier Testing System For Power Integrated Device

As the main components of Power integrated circuit, Power Integrated Device usually works in harsh environment with high voltage, large current and so on, facing serious hot carrier degradation. Except for making the device characteristic degradation and reduce regular working hours, hot-carrier degradation even impacts on the related electric circuit reliability. Therefore, it's urgent to have a testing system for the hot-carrier degradation mechanisms of power integrated device. Currently, the test system, which was built by a variety of common instruments, with complicated operation and parasitic parameters interference generated by wiring, can't satisfy the higher level of testing research requirements.Based on the hot-carrier degradation stress requirement, this thesis has designed the dynamic stress generator, generating the pulse signal whose frequency, amplitude, pulse width, rise-time and fall-time are adjustable. Simultaneously, in order to study the degradation process of the device, this thesis has also designed the degradation parameter monitoring part, controlling the system to switch between the stress model and the parameter testing model. Additionally, this system contains power model, datum model and overvoltage protection model, guaranteeing the test system stable and safety.At last, the test results demonstrate that, this presented system has generated the dynamic pulse signal stress, with 5kHz-2MHz frequency range,50ns-1550ns pulse width range and three-grade pulse amplitude. Meanwhile, the automatically records of the electrical parameters in the process of applying stress can be also realized. In summary, this system meets the application requirements of hot-carrier degradation testing of power integrated device.