Low-Density Parity-Check Codes: Design And Applications

Error-correcting codes (ECC) are indispensable to protect communication systems against noise and interference. Among them are low-density parity-check (LDPC) codes, which have drawn increasing attentions over the past decade because of their attractive performance very close to the Shannon limit.Generally, the focuses of recent researches are mainly on such aspects as the construction of well-performing codes and their theoretical analyses, encoder/decoder designing with flexibility and easiness, and their appropriate applications in different systems. Therefore, this thesis details the following three aspects: the construction of the quasi-cyclic (QC) LDPC codes capable of simple encoding and decoding; the applications of the constructed LDPC codes in various communication systems making the most use of their unique properties; encoding/decoding algorithms and hardware realization.The contents of this thesis are outlined as follows:1. In consideration of the adverse effects of the short-length loops of the LDPC codes on their decoding performance, this thesis presents one construction method of the QC-LDPC codes, which is based on graph and searches. Compared to any others of the construction of the QC-LDPC codes with larger girth, this method enables much more flexible code rates and block lengths. Besides, due to their specific quasi-cyclic architecture, linear-complexity encoding can be realized using simple cyclic-shifting registers. Moreover, this architecture can significantly reduce the storage units needed for parity-check matrixes during decoding process.2. Observing that the decoding of the LDPC codes is almost free of undetected error, this thesis also presents one scheme, named as vertical single parity check block (VSPCB) of encoded blocks of the LDPC codes, and further provides theoretical analyses of the performance over BEC and AWGN Channels, respectively. Such method is capable of correcting several errors in LDPC blocks, and thus remarkably lowers the error floor of original LDPC codes, exhibiting steep waterfall. These attractive features promise a much wider application of the short-block-length and high-rate LDPC codes in communication systems.3. Viterbi algorithm is often used to decode convolutional codes. Targeted for China Digital Multimedia Broadcasting (CDMB), a promising candidate for the mobile-TV standard, one decoding method of decoding convolutinal codes adopting the sum-product algorithm is presented. Simulations verify that about 1dB gain is obtained in comparison to the Viterbi algorithm.4. QC-LDPC codes have been adopted as the inner code of the channel (codes) coding scheme in Chinese Digital Terrestrial Television Broadcasting (CDTTB) Standard, providing 3 code rate alternatives. Exploiting their systematic circulant form, we propose an encoder with semi-parallel and pipeline architectures. Furthermore, a simplified min-sum decoding algorithm based on a posteriori probabilities is presented, which enables semi-parallel architecture implementation. The encoding/decoding of LDPC codes at multiple rates can be achieved in one transmitter/receiver. With fully multiplexing, the hardware resources can be reduced, while meeting the payload/ throughput rates requirements. The feasibility and effectiveness of both the encoder and decoder are verified on FPGA.5. On the basis of the definition of the check nodes on the Tanner graph, it presents another deduction method of sum-product algorithm that is different from that of Gallager's.