Hardware-oriented Fast Algorithm For HEVC Intra Coding

High Efficiency Video Coding(HEVC) is a new generation of video coding standard after H.264/AVC. It has been designed to improve the efficiency and adaptability of high definition video coding and transmission.While employing the classic structure of hybrid video coding, HEVC introduces a number of new features which improve the coding efficiency. Compared to existing standard of H.264/AVC, the compression performance has almost doubled. As a core module of HEVC, intra coding eliminates the spatial redundancy in video and plays a very important role in inter coding. However, the intra coding process is so complex that it occupies large parts of total encoding time. Computation mainly come from two aspects: one is the flexible quadtree division structure,in which the coding unit(CU) can be a minimum of 8x8 pixels and a maximum of 64x64 pixels. The other is intra prediction employs up to 35 kinds of prediction modes, and H.264 only supports 9 kinds of prediction mode.In order to reduce the computational complexity of intra coding, a number of optimization algorithms have been proposed by domestic and foreign experts in the direction of fast intra mode decision and fast CU size decision.And many of them achieved significant time saving with little loss of coding efficiency.However, most of these algorithms are optimized for software implementation and not suitable for hardware implementation.Because most of them exist the following two problems: for one thing, there are strong data dependency between each CU,which is harmful to hardware pipeline design. Because most of them use the results of previous step to determine the subsequent calculation.For another, the encoding time is uncertain,which is not conducive to the hardware design and real-time encoding.Because most of them focus on finding early determination conditions by analyzing the content differences of images.So the encoding time varies a lot.with images.In this paper, a fast algorithm for hardware structure design of HEVC intra coding is proposed.The novelty of the proposed algorithm lies in the following two aspects:First, the relatively simple SATD cost is employed to presplit current CTU and obtain five split schemes, the first 3 of which is selected to go through the high-complexity refined mode decision process. Second, based on the CTU's presplit schemes,an adaptively intra prediction candidates modes select method is proposed according to the importance of different shcemes.And all the CUs in one split scheme have the same number of prediction candidates modes.Experimental results show that this fast intra coding algorithm not only achieves the separation of the RMD process and the RDO process, but also reduces the computational complexity of the current HM16.0 to about 42% in encoding time with only 1.7% Rate-distortion performance loss.