Research On SAR/InSAR Real-Time Signal Processing System Based On Fpga And Multicore DSP

Synthetic Aperture Radar(SAR) can get the two-dimensional scene image with high resolution in range direction by transmitting and receiving a large time-bandwidth signal with pulse compression and in azimuth direction by processing the received echoes with synthetic array. Interferometric Synthetic Aperture Radar(In SAR) uses a couple of antennas to observe the same scene on the ground to obtain high-accuracy digital elevation map(DEM), which extends the SAR measurement scope to three-dimensional space. The SAR/In SAR technology is valuable to give deep investigatioin. Furthermore, SAR/In SAR real-time processing becomes one of the research focuses in many application fields.The SAR/In SAR processing algorithms are comparatively complex with large data volume and heavy computational complexity. Taking into account the requirements of In SAR real-time processing, we design the hardware platform consisting of one piece of FPGA and two pieces of multicore DSP. According to the processing difficulties in high-speed radar platform, we use the “ping-pang” mode in real-time processing system design to achieve the two-branch processing line of parameter and echo data. The designed architecture is able to improve the ability of data processing. Furthermore, the real-time processing system will reduce the processing time and release the constraints of hardware resources.To realize the reliable communication between SAR/In SAR real-time signal processing system and the control system, we investigate the 1553 B bus protocol and the BU-61580 chip in detail. In the following, we design and implement the 1553 B remote terminal(RT) based on FPGA and BU-61580 chip, which realize the 1553 B bus communication with the control system. In addition, the SAR/In SAR real-time signal processing system's products should be sent to the host computer. Therefore, this dissertation achieves proper communication between PC and real-time signal processing system based on FPGA and LVDS.This dissertation describes the completed chain of the semi-physical experimental system architecture. Based on the experimental system, we analyze the performance of the In SAR real-time processing system. Firstly, by using the double-edge data sampled by AD, we explain the non-ideal effect of data acquisition on the interferometric phase and the DEM generation. Through the analysis, we draw the conclusion that the channel error between master image and slave image should be estimated and corrected to improve the In SAR coherence and the accuracy of DEM generation. Secondly, we achieved the real time DEM generation with high speed platform. We focus on the processing steps of absolute phase estimation without precise ground tie points. For the ground scene with elevation, we use the coarse DEM data to calculate the ambiguity numbers of In SAR phase. Finally, we test and verify the SAR/In SAR real-time signal processing system under the simulation circumstance and the semi-physical simulation circumstance respectively. For the simulation circumstance, we verify the effectiveness of “ping-pang” working model by three sets of real-time processing results, which are processed by the left DSP and the right DSP in turn. Meanwhile, we investigate the validity of SAR/In SAR real-time processing by comparing the processed DEM results of each frame with the referenced DEM data. For the semi-physical simulation circumstance, we test the effectiveness of the SAR/In SAR real-time signal processing system by comparing the real-time DEM results with the referenced DEM data.