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Design And Implementation Of Analog Circuit For RFID Tag Front End

Posted on:2017-08-29Degree:MasterType:Thesis
Country:ChinaCandidate:Z F GaoFull Text:PDF
GTID:2348330488474619Subject:Engineering
Abstract/Summary:PDF Full Text Request
In recent years, with the continuous development of the Internet and the popularity of RFID technology, Internet of Things began to flourish. As an RFID tag most common form of expression, frequency of 13.56 MHz contactless passive integrated circuit card with its portable, Simple, fast identification, safe and reliable, and many other advantages in the public security, transportation, financial and medical and other fields has been widely used, it has been inextricably linked with people's lives. Wherein the analog front end circuit as a bridge between the non-contact passive RFID tag chip and reader communication, combined with the power management unit to generate a stable power supply voltage, reference base and power-on reset signal, the energy coupling of electromagnetic waves, the data signal demodulation extraction, recovery generates a clock signal and a load modulation for signal feedback and other aspects play a crucial role, therefore, is gaining more and more attention and research.In this thesis, the development process of RFID technology to start, according to the evolution trend of electronic tags, RFID technology combined with the application of state of the environment and the domestic and foreign research on the concept of the most widely used contactless passive RFID cards and systems framework presentation, and ISO/IEC14443 protocol specification contactless IC card for a detailed interpretation and analysis. In meeting the requirements of the agreement, the paper from the functional principles and design specifications of each unit circuit AFE start, the feasibility of the circuit design, designed to meet the appropriate passive 13.56 MHz contactless IC card chip low rate transmission high-performance analog front-end circuitry, and the entire analog front-end circuitry simulation and optimization analysis, given the circuit layout design guidelines requirements and after flow sheet data chip packaging and testing.Through the protocol specification and the circuit modules function in this paper based on the traditional design of the above, the circuit design is improved ESD performance highlights include combining multiple parallel output NMOS gate cross-connected rectifier circuit design, different fields Strong lower limiter adjustable circuit design, the design of low-power clock generation circuit and the low transmission rate can be achieved demodulated signal demodulation circuit design and so on. And gives the design ideas and methods of each module the power management modules, including power supply with current limiting regulator circuit for generating a reference voltage and bias current bandgap reference circuit that generates a stable power supply voltage low dropout linear regulator circuit, and provide a reset signal to digital logic power-on reset circuit. Then build an antenna model in the case of analog front-end circuitry of each module and the entire sub-circuit simulation results show that the circuit design specifications meet the requirements.Finally, based on UMC 0.11 EEPROM 2P8 M technology, the paper gives the layout of this 13.56 MHz contactless passive RFID AFE by MPW tape, for packaged chip samples for testing. The samples test results indicates that the chip is stable, functional integrity, meet the requirements of the protocol and design specifications.
Keywords/Search Tags:RFID, Electronic tags, contactless passive, tanalog front end, ISO/ IEC14443
PDF Full Text Request
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