Research On DDR4 BER Eye Diagram Techniques

When the speed of the transistor device in the electronic system is dominated by the speed of the input/output, people generally do not pay much attention to whether the signal is complete or not. And when the reflection, cross-talk and power noise and other images gradually exposed, engineers are only in accordance with the case to analyze and deal with the case. However, in order to improve the performance of the electronic system comprehensively and effectively, a large number of engineering development and research personnel with different technical backgrounds have been put into the research. As the I/O interface speed increases up to multi-gigabit data rates, the property of an I/O link path is ultimately characterized by the voltage and timing margin at a given bit error ratio(BER),which makes the BER eye diagram becomes the key to the performance of high-speed link prediction.Industry usually use two methods to get eye diagram. The first is model the entire link using a SPICE-like time domain simulator. Since it is not possible to increase the number of bits used in the simulation to validate the low BER needed in links today and it is time-consuming. Another is the worst case analysis method, this method can only get the worst case eye diagram. And the algorithm is simple and often leads to the excessive pessimism. In the face of these problems, this article develops new perspective, from the statistical point of view to estimate the performance of high-speed link BER eye diagram analysis.In this paper, statistical link analysis attempts to account for all relevant noise and interference sources in a probabilistic fashion to derive statistical performance metrics like BER analytically, without extensive behavioral/circuit simulations. From the perspective of statistics, this paper will explore the solution of DDR4 high-speed link BER eye based on edge response. At first, this method will take the influence of channel inter-symbol interference(ISI) and co channel interference(CCI) effects into account at the same time,the channel BER eye are obtained by the idea of convolution, called Pre-aperture eye. And combined with the joint probability distribution of the TX jitter and noise, then will get the final BER eye, called Post-aperture eye. On this basis, the designer can draw any value of BER(such as 10-16) under the eye diagram, it is not limited to the worst eye diagram. In addition, the interface design has also added the Mask DDR4 module, which can be more intuitive to determine whether the margin of system meet the design requirements.In view of the above research, we developed a BER_Tools software based on MATLAB GUI, which is powerful proof of the algorithm results. The testing parameters(eye height and eye width) of worst eye diagram from this software and the Intel MBERE error within1%, compared to the result of simulation. This also shows the effectiveness of the algorithm. The accuracy of BER algorithm based on single-bit response(SBR) and double edge response(DER) is high and it has great theory value. DER algorithm can deal with rising edge and falling edge of asymmetric case, the simulation results more in line with the actual and have high value in engineering.