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An Investigation Into Key Issues Of Mitigating Memory Interference In Multicore Systems

Posted on:2017-05-30Degree:MasterType:Thesis
Country:ChinaCandidate:X L MengFull Text:PDF
GTID:2348330482986771Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
Nowadays,how to reduce memory interference has become a hot issue in academia and industry.In the modern multi-core system,the unbalanced development between the processor and memory causes the current storage speed seriously lagging behind the processor's computing speed,thus forming the “memory wall”.The “memory wall” which has seriously hampered the performance of multi-core processors,is the key part to restrict the overall performance of the computer.Modern multi-core system usually shares the last level cache(LLC)and main memory,among which DRAM plays an important part in shared resources.The fierce contention of shared resources between multiple threads executed simultaneously on different cores brings serious memory interference.Memory contention and interference among threads can reduce the speed of response of the DRAM memory system,pull the memory latency,and expand the processor and memory gap,thus resulting the more and more serious “memory wall”,which may induce performance degradation unevenly and unfairness resource sharing.In addition,the thread of memory interference may also lead to the thread's priority inversion even starvation.In this paper,we propose a novel software solution——PseudoShare framework from the operating system perspective,which is based on the operating system and computer architecture theory to mitigate the memory interference and improve the overall performance of system and fairness.In the principle of DRAM performance optimization and premise of DRAM Bank level parallelism,the PseudoShare framework partitions DRAM Banks into different memory groups,mapping the access request to the exclusive memory Bank group,thus reducing the conflict of row-buffer on DRAM Bank,mitigating the memory interference and improving the overall performance of the system.The major contributions of this paper include the following points:(1)In this paper,by analyzing the relationship between the performance of the program and Bank level parallelism,we get the conclusion that since the number of Bank is limited,So you can only assign the matching Bank numbers to meet its capacity requirements,and to ensure that the Bank level parallelism.(2)In this paper,we propose a memory aware page allocation algorithm,named as BAPA.This is a new memory allocation algorithm.BAPA can awares the DRAM Bank,and mitigates the memory interference in premise of DRAM Bank level parallelism,which are difference from the default page allocation algorithm of operating system.BAPA's core idea is the DRAM Bank partitioning mechanism,which avoids the blindness of the original algorithm to the resource allocation,thus mitigating the memory interference among simultaneously running thread.(3)This paper proposes a PseudoShare framework for the combination of page allocation and group scheduling,the framework partitions all threads and memory into thread groups and memory groups respectively.Each thread group is bound to one core which threads only run on the core,and through memory aware page allocation of operating system each core accesses unique memory group.One core,one thread group and one memory group form a thread-core-memory,all thread-core-memory of sharing the same memory group form an independent subsystem.After forming independent subsystems,the mainly contention is from bandwidth.So PseudoShare patition bandwidth,the uneven performance degradation and fairness problems induced by shared memory will mitigate.The experimental results show that the overall performance and fairness of the system are improved by PseudoShare on the 4 core /8 core,and the power consumption is reduced by an average of 5.3%.(4)In this paper,the method of pure software is used to solve the problem of memory interference.We implement the PseudoShare framework in the Linux kernel without changing the hardware,so as to avoid the time cost of modifying complex hardware logic.
Keywords/Search Tags:multi-core system, memory interference, DRAM Bank partition, page allocation, thread group scheduling
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