Scheduling Research For Memory Controller Based On Density Of Memory Access

In a modern chip-multiprocessor(CMP) system, memory system is a shared resource among multiple concurrently executing threads. In a shared memory system, requests from a thread can not only delay requests from other threads but they can also destroy other threads' parallelism of accessing memory. As a result both fairness and system throughput degrade, and some threads can starve for long time periods.It is ineffective, unfair to access shared memory for multi-thread on CMP, this thesis presents a new memory scheduling approach-- Priority Based Memory Fair Scheduling(PBMFS) that resolves memory interference among threads to improve the system fairness and throughput. PBMFS has two major parts: selecting latency-sensitive thread and priority based batch scheduling. Selecting latency-sensitive thread chooses the latency-sensitive threads by statistics data of threads' memory behavior to prior schedule these threads' memory requests. Priority based batch scheduling groups a number of outstanding memory requests into batches and ensures that all requests belonging to the current batch are serviced before the next batch is formed and scheduled by the thread's priority. It not only ensures fairness but reduces memory interference between threads, resulting in higher system throughput.Relevant experiments between PBMFS and other three memory scheduling are designed. The experiment results indicates that PBMFS can achieve higher system fairness and throughput. Compared with First Ready-First Come First Serve(FR-FCFS), on average, PBMFS improves system fairness by 32.3% and throughput by 10.2%.