Study About Engineering Implementation Of Blind Identification Algorithm And High-speed And Real-Time Processed Platform

With the innovation of semiconductor technology, digital signal processing technology has been rapidly developed, which is widely used in civilian and military fields, and considered as a key information processing technology during post-PC era. With the increasing complexity of the algorithm, large-scale and high-speed data need be processed in real-time, which put forward new requirements at platform architecture selection, algorithm realization, structural optimization, resource scheduling and so on.Based on the characteristics of High-speed and Real-time, this thesis analyzes the basic framework of universal High-speed and Real-time digital signal processing system. Firstly, the core processor chip is highly considered and selected on the following factors: compatibility, processing speed, precision and flexibility; Secondly, high-speed interconnect parallel system is considered and designed, include FPGA and FPGA, FPGA and DSP, FPGA and SFP. Thirdly, chips about high speed storage cells are taken into consideration: use Flash to consolidate program, and DDR2 as the large capacity cache. Lastly, the communications of bus with external device are analyzed: such as USB, RS232 and PCI.The logic design of Blind Identification algorithm has been completed at the High-speed and Real-time signal processing platform. Firstly, the dissertation introduces the function of Blind Identification algorithm, which suppress the nonlinear distortion caused by Front-end Receiver, then briefly describe the processing flow of algorithm. Secondly, functional module was divided into four by the means of Top-down: Periodogram calculation module, Noise reduction at frequency domain module, Division of big signal and small signal module, Matrix calculation concerned with blind identification algorithm module. Finally at the aid of professional simulation software, four core modules were simulated, and the related functional simulation time map were listed. According the data flow, each module was assembled and debugged online. Algorithm can be dealt with high-speed and real-time.In order to verify the effectiveness of the algorithm, processed data is transmitted to PC in real-time via the port of PCI after blind identification algorithm. The results show that blind identification algorithm can be processing within the specified time. The performance is obvious, stable, and the nonlinear distortion can reach 20 dB maximum suppression.