Research And Implementation Of High-speed Digital Image Capture And Transmission Technology

In recent years, image processing and detection technology has been widely applied in the defense industry, automotive electronics, medical, video surveillance and industrial measurement areas, and how to solve the contradiction between high image resolution and real-time transmission, developing a kind of industrial camera of better real-time performance is great significant for the development of related fields. With the development of networks and multimedia technology, it results in higher requirements for storage and transmission of data information, and it brings severe tests to the limited bandwidth, which greatly limits the application of visual corresponding. So image data compression is getting broad concern increasingly.Industrial high-speed cameras are designed in order to achieve high-speed acquisition and transmission of image data, which is based on DSP and FPGA core processing architecture. After real-time acquisition of image data and simple image preprocessing algorithm in FPGA, the image data is transferred to the DSP for complex processing algorithms, and the system communicates with the host computer via high-speed Ethernet interface. The speed of image acquisition and transmission is greatly improved by taking advantage of high-performance DSP & FPGA and high-capacity storage technology, as well as improving the efficiency of the FPGA image preprocessing algorithm and implementing JPEG image compression algorithm in the DSP. Experimental results show that the image acquisition and transmission rate is up to 30 fps when the image resolution is 1600 ?1200, meeting the real-time requirements of image acquisition and transmission in most industrial areas. The main contents of context are as follows:(1) By studying the current development of domestic and foreign industrial cameras, analyzes the gap of software and hardware between them, summarizeing the development trend of industrial cameras.(2) Industrial high-speed cameras with DSP + FPGA architecture are designed on the basis of previous research, which read, write and store image data by high-speed DDR2 SDRAM in real time. Hardware circuit design system according to the requirements.(3) High-speed signals of DDR2 are routed based on the principle of PCB high-speed signal layout, meeting the requirements of equal length in the same group signals and 3W spacing between different groups of signals.(4) FPGA is programmed to control CMOS sensor image acquisition, and DDR2 SDRAM Controller is imeplementated through IP core design, besides, images is acquired by ping-pong architecture of DDR2 and is processed by realizing median filter of field algorithm.(5) JPEG image compression algorithm is achieved in the DSP, and Ethernet communication is realized between DSP and the host computer via NDK network programming.(6) Under laboratory conditions, the distortion parameters of the CMOS camera are calibrated, achieving CMOS lens distortion correction, and then the error of system measurement is analysed on the basis of experiments.