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Fabrication And Characterization Of Cu-Sn-Ni-Cu Interconnection Microstructures For 3D Integration

Posted on:2016-06-06Degree:MasterType:Thesis
Country:ChinaCandidate:M XiaoFull Text:PDF
GTID:2348330479452774Subject:Materials Processing Engineering
Abstract/Summary:PDF Full Text Request
As one promising alternative to solder bump interconnection in fine-pitch electronic packaging and 3D integration, Cu pillars interconnection has drawn a wide attention due to its great advantages of mechanical performance and electromigration-resistance performance compared to solder bumps. Cu-Sn-Cu microbumps fabricated by thermo-compression bonding process are commonly used for the electromigration performance study of the Cu pillars. However, the bonding process requires a high flatness of Cu-Sn pillars prepared by electroplating methods, and the intermetallic compound(IMC) formed during the bonding process would have a great effect on the reliability performance of microbumps. Furthermore, the decreasing of the microbumps size demands a higher requirement for more precise control of the process parameters and its reliability performance. Therefore, a new method to fabricate the interconnection microstructure is urgently needed for the electromigration performance study of Cu pillars.This paper firstly presents the fabrication and characterization of the Cu-Sn-Ni-Cu pillars with the diameter of 10~40 mm by photolithography and multi-electroplating methods. The geometry and surface morphology of Cu pillars, Cu-Sn pillars, Cu-Sn-Ni pillars and Cu-Sn-Ni-Cu pillars are studied and the growth process and morphology evolution progress are analyzed. Furthermore, the interface of obtained Cu-Sn pillars and Cu-Sn-Ni-Cu pillars are also studied.Based on the obtained Cu-Sn-Ni-Cu pillars, the interconnection microstructure of these Cu-Sn-Ni-Cu pillars are designed and fabricated. A multi-electroplating and three-mask procedure is proposed to fabricate the bottom-layer interconnection lines, middle-layer Cu-Sn-Ni-Cu pillars and top-layer interconnection lines. During the fabrication process of the top layer, a sputtered Cu layer which functions as the barrier layer is introduced to prevent the middle-layer photoresist from being developed during the photolithography process. The interconnection microstructures with good electrical performance are achieved by applying this process.Considering about the actual geometrical parameters of the Cu-Sn-Ni-Cu microstructures, a multi-physics field simulation is performed to analyze the distribution of temperature gradient, current density and von Mises stress under high current stressing situations. The driving forces of electromigration, thermomigration and stress-migration for atomic migration of Cu, Sn and Ni components are calculated to predict the potential failure locations for the interconnection microstructures. Furthermore, the effect of ambient temperature, applied current and the diameter of pillars on the driving force for atomic migration are also studied.
Keywords/Search Tags:3D packaging, Cu pillars, Interconnection microstructures, Fabrication process, Electromigration, Numerical simulation
PDF Full Text Request
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