Numerical Simulation Analysis Of Removal Process For CMP Interconnection Chip

With the rapid development of semiconductor industry,the requirement to improve chip production efficiency and the integration degree of integrated circuit(IC)and to reduce the size of the device on chip technology has been put forward,which results in that traditional polishing technology cannot meet the requirements of the new chip technology.The chemical mechanical polishing technique can be used for the global flatness of the chip,so it is widely used in the production of the semiconductor industry,for example,the global flatness of the chip interconnection layer.The CMP process is affected by many factors,and it is not easy to control.Therefore,it is still not clear enough to understand the mechanism of contact removal of CMP material and further research is needed.This paper was established on the basis of after consulting many domestic and foreign experimental researches and related literature,based on the understanding of typical CMP grinding particle abrasion materials removal mechanism and chemical materials removal mechanism and used finite element software ABAQUS to simulate of chip interconnection CMP material removal process.Firstly,we considered the oxidation of polishing solution and the indentation simulation was carried out.The same pressure depth was obtained and surface stress of the oxidized chip was less than that of the surface of the non oxidized chip.On the surface of the oxidized chip,the plastic was removed.But the surface of the unoxidized chip was only deformed,that was,the oxide layer was easier to be removed than the surface material of the oxidized chip.To further explore the CMP material removal and process parameters,the contact model of abrasive and chip plough cut was established.The result was that the friction coefficient of grinding grain and chip interconnect asperity contact interface increased gradually with the increasement of polishing speed and shear and extrusion effect of the grinding grain on the chip surface results in the stress propagating along the direction of 45 degrees and the discontinuity of chip oxidized layer expanding to the chip substrate.By using the orthogonal analysis of CMP process parameters,when the grinding and the particle diameter was 30nm,work load was 4000nN,and polishing speed was 12mm/s,grinding grain and chip oxidation layer with a rough surface contact process could realize the maximum material removal rate.Finally from the overall point of view of the chip CMP interconnect structure damage simulation,low k layer crack and maximum shear stress often appeard at the corner of the interconnection structure.The increasement of polishing speed could weaken the low-k structure crack propagation.When the copper film thickness was less than 20nm,polishing speed with 10mm/s caused little damage to low-k interconnect layer.When copper film thickness was more than 25nm,maximum shear should stress and the principle stress decreases faster with the increasement of copper film thickness.The accumulation of stored strain energy increased the risk of low k dielectric layer crack.The change law of friction and dissipation energy of the contact interface of the chip was consistent with the law of material removal.Through the deep understanding the impact of the process parameters on the interconnect structure damage and further optimization of the process parameters of CMP,the improvement of CMP material contact removal efficiency had a far-reaching significance.The results of this study provided a theoretical basis for the further research on the contact removal mechanism of CMP materials and the application of tribology in practical engineering,and it had some guiding significance.