Design And Implementation Of One Attack Resistant Cryptography Circuit

With the development of integrated circuit industry today, embedded system products is used more widely. At the same time, some of the applications for safety-critical embedded products raise highly requirements for resistance against power analysis attacks. The circuit based on constant power cell is resistant to power analysis attack. WDDL technology combined with characteristics such as:portability, designability, which can make WDDL technology one of the best power analysis attack resistant technology.The realization of the DES encryption circuit based on WDDL which resisitant to power analysis attack is discussed. Firstly, the basic physical theoretical of power analysis attack and a detailed description of the various power analysis attack techniques are discussed. By analyzing advantages and disadvantages of existing solutions, this paper pick up the research point based on WDDL logic encryption circuit. Secondly, A FPGA-based WDDL semi-custom design process is proposed to achieve the differential routing on the FPGA. Lastly, considering the successful experiments based on FPGA design, the WDDL cryptography circuit based on SMIC-0.18um is designed. Front-end and back-end design flow of WDDL circuit is proposed, and the differential routing method based on cross lines is proposed to improve the differential routing load balancing effect. Simulation power analysis attack platform based on EDA software is designed. Based on this platform, ASIC cryptography circuit is tested and evaluated.Simulation and experimental results are provided. Test results show that, WDDL DES encryption circuit based on FPGA is still safe from break at 500,000 power traces. Simulation results show that the power analysis attack resistant ability of WDDL DES encryption circuit based on ASIC compared to unprotected DES encryption circuit at least 150-fold increase.