The Design Of A High Linearity Power Amplifier

With the development of communication technology, in order to improve the utilization rate of spectrum, the combination of amplitude phase modulation technique and multicarrier modulation system has been widely used, which put forward high requirement of the power amplifier linearity. So, the design of linear power amplifier is critical.A summary of the background and research status of high linearity power amplifier was presented, then the principle of nonlinear distortion of power amplifier was discussed. Additionally, a high linearity power amplifier applied to IEEE 802.11b was presented to reduce nonlinear distortion of power amplifier by means of maintaining a constant transconductance of input transistor and reducing the amplitude distortion of the output signal. The parallel translinear structure was adopted in the input stage of the high linearity power amplifier, using the auxiliary power amplifying transistor to compensates the transconductance losses of the main power amplifying transistor. A envelope detection circuit module with high performance was designed to detective the envelope of the input signal and outpur signal, then the negative envelope feedback structure making the output signal envelope follow the input signal envelope was used to reduce the amplitude distortion of the output signal. A matching network was designed and optimized to reduce the parasitic effects.The schematic design and the layout design of the power amplifier were based on the process of SMIC 0.18um RFCMOS. The post simulated results of the chip showed:under the 1.8 V supply, the maximum output power of the high linearity power amplifier was 15.16dBm, the 1dB gain compression point was 22.6dBm, the output third intercept point was 32dBm, and the power-added efficiency was 18.5%.