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Design Of Low Power RF Front-end In The 2.4 GHz RF Receiver

Posted on:2016-04-25Degree:MasterType:Thesis
Country:ChinaCandidate:J LiuFull Text:PDF
GTID:2308330503476658Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Recently, wireless sensor networks have been widely adapted for pollution detection, intelligent transportation system, industrial monitoring, etc. Because a wireless sensor network consists of many distributed sensor nodes that operate continuously over duration greater than one year with only a single battery, low-power transceivers have drawn designers’ attention. Therefore, the study of low power RF front-end, which is one of the most power hungry modules of the transceivers, is of great significance.A low-power RF front-end for 2.4GHz RF receivers is proposed in this thesis. The basic concepts of receivers are introduced, including key parameters and the main receiver architectures. According to the ZigBee specification and the application requirement of wireless sensor networks, the parameters of the proposed low-power RF front-end are determined. In order to realize the low power consumption, the transconductance stages of the I、Q mixers are merged with the low noise amplifier. As a result, the key feature of the proposed low-power RF front-end is a single low-noise transconductance amplifier driving the 25% duty-cycle IQ switching stage, which is terminated by two low-input-impedance transimpedance amplifiers. The low-noise transconductance amplifier employs the current-reused technique and the gm-boost technique that is enabled through a capacitive cross coupling, so that the high conversion gain and the good noise performance are achieved. The 25% duty-cycle IQ switching stage is implemented by using serial switches driven by 50% quadrature LO signals separately, which improves the down-conversion gain by 3dB and lowers the noise figure compared to the 50% duty-cycle switching stage. The transimpedance amplifier employs the cross-coupled positive feedback technique to realize the low input impedance.The schematic and layout of the proposed low-power RF front-end is designed in TSMC 0.13μm CMOS technology. The post simulation results show a conversion gain of 30.2dB, a SSB NF of 7.8dB and a IIP3 of-16.2dBm, while the proposed RF front-end consumes only 1mW from a 1.2V supply voltage, which meets the requirements of the front-end for RF receivers.
Keywords/Search Tags:RF receiver front-end, low-power consumption, modules-merged technique, current-reused technique, 25% duty-cycle, transimpedance amplifier
PDF Full Text Request
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