Design And Research Of Heterogeneous Noc On GPU-like And GPU-CPU Architectures

The design of multi-core processor divided into two different orientations since 21 st century. One is CPU which keeps programs executing in sequence, the other is GPU which is suitable for parallel calculate. The performance of GPU in floating-point calculation is better than CPU since the born of GPU. The performance gap between GPU and CPU propel developers to deliver the proportion of compute-intensive to GPU. Computer architecture is transiting from the CPU-like era into GPU-like and GPU-CPU heterogeneous era. Network-on-chip(NoC) is used to access shared resources by multi-core processor chips and how a network is configured will likely have a significant impact on overall performance and power consumption. Recently, heterogeneous NoC has been proposed not only to achieve performance comparable to that of the NoCs with buffered routers but also to reduce area and power consumption. However, heterogeneous NoC design for GPU-like and heterogeneous GPU-CPU architectures has not been studied in depth.GPU-like and GPU-CPU architectures pose new challenges to the design of NoC. Firstly, Dennard Law goes dead and triggers the Dark Silicon in multicore era. The chip power limits the number of transistors can be lighten. It lasts for a short time that processors are all activated. That means for a not very short time, some processors regions are always in dark state. NoC power occupies a significant portion of power budget. Therefore, it propels us to optimize NoC to save more power for cores performance. Secondly, GPU has more threads compared to GPU, the characteristic makes the communication among GPU, Last Level Cache and Memory Controller more frequent. The traffic of CPU is smooth, but the traffic of GPU has more hotspots. How to design heterogeneous NoC fitting for new GPU-like and GPU-CPU architectures is the problem we concern.This paper first categorized GPGPU workloads into three types as Dark-Silicon-Sensitive, Dark-Silicon-Insensitive and Dark-Silicon-Adaptive based on the program adaptability to dark silicon, exploring how different placements of heterogeneous NoC influence the dark silicon degree by evaluating performance of workloads and power consumption of NoC. The results show that heterogeneous NoC can reduce the degree of dark silicon compared to conventional NoCs with buffered router, allow chip to activate one additional core under certain power budget. The performance of Dark-Silicon-Sensitive workloads improved by 10% at least. Our work provides a reference for choosing NoC placement in certain power budget. Then, this paper evaluates the performance and power consumption of a variety of static hot-potato based heterogeneous NoCs with different buffered and bufferless router placements based on heterogeneous GPU-CPU architecture, which is helpful to explore the design space for heterogeneous GPU-CPU interconnection. At last, this paper proposes Unidirectional Flow Control(UFC), a simple credit-based flow control mechanism for heterogeneous NoC in GPU-CPU architectures to control network congestion. UFC can guarantee that there are always unoccupied entries in buffered routers to receive flits coming from adjacent bufferless routers. Our evaluations show that when compared to hot-potato routing, UFC improves performance by an average of 14.1% with energy increased by an average of 5.3% only.