The Design And Research Of High Precision TDC System Based On Fast Carry Chain In FPGA

Time plays a key role in the development of physics and other field, and the measurement of time interval has been widely used in digital communications, aerospace,metering and navigation position. Therefore,measuring the time interval accurately is a technology that is vital in many field.There are many methods of high-precision of time interval, the method used in this paper is to achieve the precise measurement of the time interval based on the interpolation techniques of the carry chain of FPGA, and measuring the time interval from the signal to be measured to the different base station, by getting the high precision of time interval can get the corresponding distance gap. Using the data that cores from multiple measurement to draw a hyperbolic, the forces of which is the two different base station. The intersection point of two hyperbolic or more results from such a method is the specific location of the two base stations. Thus, it comes to the purpose of the orientation. Precision measurement of the time interval between the different signals is achieved by the time converter.The paper introduce the logic modules which make up the carry chain in FPGA and mainly discus the format form and rules of the carry chain. In the process of timing simulation, finding that it has time delay when signals go to the carry chain. Using the design tool of Plan-Ahead and FPGA Editor to adjust the important signal pathway, reduce the different time delay which is led by the different data pathway. As a result, it can decrease the final measurement error.The paper has multiple measurement of this design by changing the size of the time interval. Combine ISE and Modelsim to do the simulate for this design. When the result of the simulation reached the expected requirement, then download the bit document to the Spartan 6 development of the Xilinx company to do the board level verification. Through observation and analysis of the signals by the logical analyzer Chipscope Pro, the design can be modified and improved. Finally, the measuring accuracy of this time interval measurement system can meet 120ps, and the dynamic range of measurement can be flexibility changed, according to the size of the register. the size of register used in this design is 16-bit, and the dynamic range of measurement can reach 700ns.The verification results of the experiment show that the TDC based on the carry chain of FPGA have many advantages, including simple circuit design, high measuring precision, flexibility measuring range and the low design cost. With the high development of technology, the design will have further development and higher improvement space.