Research And Design Of Reconfigurable Analog-to-Digital Converter For Sensors

With the diversification of the signal which is received by sensor, the differences of ADC’s parameter requirements, like bandwidth, precision, speed, etc. are gradually increased. A number of different performance ADCs are needed to meet the functional requirements, it increases the chip area, power consumption and design cost. To reduce these effects, a reconfigurable Algorithmic-∑△ADC is designed. By change the number of conversion cycles for every sampled input signal, it can achieve different conversion accuracy and speed, without at the expense of increasing power consumption or chip area.Firstly, this thesis introduces the basic architecture and performance of existing reconfigurable ADC, and with considering the speed, accuracy, power, area, and other factors based on low-power application environment, the architecture of reconflgurable ADC is determined, a working principle of the two steps based on the structure of Algorithmic ADC and Sigma-Delta ADC, and introduced the basic principle in detail.Secondly, this thesis analyzes the various non-ideal factors in reconfigurable Algorithmic-∑△ ADC, such as non-linear of switch’s on-resistance, channel charge injection, kT/C noise, noise and finite DC gain of op amp, etc. Through modeling and simulation in MATLAB for the analog part of the ADC, these non-ideal factors and performance parameters of each module are evaluated, which provides guidance for the circuit design.Finally, key circuits are designed and simulated based on TSMC 0.18μm CMOS process, such as two-phase non-overlapping circuit, reconfigurable switched-capacitor circuit and the clock reset control circuit, high-performance comparator circuit, etc. According to the similarity of ∑△ modulator and Algorithmic ADC at circuit structures, a shared technology is achieved in op-amp of switched-capacitor circuit, comparators, feedback circuit, this method effectively reduces system power consumption and area.When the clock frequency is 256kHz, supply voltage is 2V, simulation results show that with control of the reset switches, the system can achieve three reconfigurable modes which ENOB is 14bit/12bit/10bit, sampling rate is 16KSPs/18KSPs/21KSPs and maximum circuit power is 0.955mW, is very suitable for low-power sensor applications.