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Design Of Image Acquisition System Based On FPGA And GigE Vision Cameras

Posted on:2017-03-12Degree:MasterType:Thesis
Country:ChinaCandidate:K Q YaoFull Text:PDF
GTID:2308330488473492Subject:Integrated circuit engineering
Abstract/Summary:
GigE Vision is a global industrial camera interface standard developed from the Gigabit Ethernet communication protocol. For its excellent performance, GigE Vision camera is widely used in different fields. However, when it transmits the image, GigE Vision camera always divides the image into several segments and then send them respectively. If receiving image by software, the CPU should analyse the network protocols and regroup the image data. So it’s easy to result in low image acquisition speed because of high CPU utilization.In this thesis, a high speed image acquisition system based on SOPC is designed, which takes FPGA as the control unit and implements the GigE Vision camera as the image acquisition device. The whole design includes logic design based on FPGA and software design based on SOPC. In respect of logic design, to improve the image acquisition speed, and at the same time reduce logic resource consumption, this system proposes a new design solution, which is an image acquisition controller IP core. This IP core simplifies and optimizes the Ethernet controller according to GigE Vision standard. So the resource consumption is sharply reduced. At the same time, it uses hardware logic to recognize and analyze the GigE Vision packets, and automatically stores image data, as raised image acquisition speed. The entire system contains the Nios Ⅱ processor, image acquisition controller based on GigE Vision, RAM blocks and other modules. In respect of software, except for the image acquisition software design, the software design also includes image acquisition controller driver design, camera communication API design and computer communication API design, which provides convenient APIs for continued system development.Experimental data demonstrate that, image acquisition system based on FPGA and GigE Vision which is designed in this project, has the feature of high image acquisition speed, low logic resource consumption and low CPU occupancy rate. When the image size is 1280 x 256 pixels, image acquisition speed is up to 228 frames per second, which is the speed limit of the camera. At the same time, the CPU occupancy rate is basically stable at 0.024%.
Keywords/Search Tags:GigE Vision, FPGA, Image Acquisition Controller, SOPC, Nios â…¡
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