Research And Design Of W Band Tripler Based On SiGe Process

With the rapid development of wireless technology, spectrum resources become more and more valuable and the millimeter wave band has attracted more and more attention, and W band has been the research hotspot. On the one hand, SiGe BiCMOS process has been widely used in millimeter wave devices or system due to the high precision, small size and high reliability. Therefore, using this process to design W band devices and systems has very considerable prospect. On the other hand, the multiplier is an important device in millimeter signal link and it has widely impact on millimeter wave system. Therefore, this article will present the detailed study and design on the W band tripler based on the 0.13 um SiGe BiCMOS technology. The main work is given as follows:The first chapter briefly reviews the research background and the present development situation of monolithic microwave integrated circuits(MMIC), briefly introduces its process technology, and summarizes the development status of W band frequency tripler.The second chapter discusses the nonlinear characteristics of diode and transistor frequency multiplier, and analyses both the single frequency tripler’s and single balanced frequency tripler’s working mechanism of the two frequency multiplier device. Compared with the diode frequency multiplier, the transistor frequency multiplier has better performance, higher flexibility and wider application, so this paper uses transistor as the frequency multiplier device.The third chapter discusses several passive devices required in the tripler design: The W band filter is used to design the single frequency tripler. It adopts the structure of two order quarter wavelength stepped impedance resonator and source load coupling to reduce the large size of chip filter, and by adjusting the stop band to increase the fundamental and hign harmonic suppression of the single frequency tripler; The Ka and W band balun is used to design the single balanced tripler. It uses the process of multilayer structure and the form of similar to the spiral inductor to make its size in greatly reduced, and take the line compensation method to reduce the unbalance phase degree. At the same time, the balun also take the large bandwidth and low conversion loss into account.The fourth chapter analyzes the schematic of three kinds of frequency triplers in details based on the introduction of SiGe process device model, and then use RF simulation software to complete the simulation. At the point of selecting the bias point, this design not only gives the theoretic analysis, but also use RF simulation software to confirm it. It is undoubtedly more reliable by combining theory and simulation. Secondly, this design uses the load-pull technique to extract the source and load impedance of the third harmonic, in which the maximum of third harmonic power can be obtained.The fifth chapter mainly discusses the layout design of three kinds of frequency triplers, and briefly introduces 0.13μm SiGe BiCMOS process flow and the MMIC measurement technique. This design completed strictly in accordance with the requirements of 0.13μm SiGe BiCMOS process. As a result, the final layout has met the requirements of fabrication. Some layout simulation results are given as follows: when the input power is fixed to 0dBm, the conversion loss of single tripler is less than 6.4dB in 80~90GHz, the 3dB bandwidth is 22 GHz, the fundamental and second harmonic suppression are both great than 25 dB. The balance tripler’s conversion loss is less than 4.6dB in 80~90GHz, the 3dB bandwidth is 30 GHz, and the fundamental suppression is great than 18 dB and the second harmonic suppression is great than 30 dB. The low insertion loss balance tripler has about 0dB conversion loss in 80~90GHz, the 3dB bandwidth is 27 GHz, and the fundamental and second harmonic suppression are both great than 45 dB.