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Design And Implementation Of High Performance Decoder Based On Heterogeneous Platform

Posted on:2017-04-17Degree:MasterType:Thesis
Country:ChinaCandidate:W ZhangFull Text:PDF
GTID:2308330485980060Subject:Software engineering
Abstract/Summary:PDF Full Text Request
HD video plays more and more important role in our daily life, with the popularization of the HD video, the higher efficient video coding algorithm is also being put forward and perfect constantly. At present, the HEVC put forwarded by the Joint Collaborative Team on Video Coding(JCT-VC) become the most efficient video coding standard, it can gain the double times of compression ratio than H.264, but at same time, its code complexity is two to four times than H.264. Because of its better performance on compression ratio, HEVC has a good develop space, but the complex of video coding make it hardly to satisfied to the hard real time requirement. The HEVC standard is introduced in our paper, and we will produce a real time HEVC video decoder that is based on a heterogeneous platform.In particularly, the considerable amount of intra prediction modes that are now considered by this standard, together with the increased complexity of the adopted block coding tree structures using a larger diversity of transforms imposes demanding computational efforts that can hardly be satisfied by current general-purpose processors to attain hard real-time requirements. Moreover, the strict data dependencies that are imposed make parallelization a difficult and hardly efficient option with conventional approaches. To circumvent this adversity, this paper exploits Graphics Processing Units (GPUs) to accelerate the intra decoding procedure in HEVC, encompassing the most demanding modules of the decoder. Meanwhile, a memory access order analysis is performed on the every frame before its decoding, according to the result of this analysis, in order to reduce the conflict between different memory block when they loading to the cache, some memory block will loading to the Shared Memory first.In the procedure of the decoder’s implementation, the Entropy Decode is operated on CPU, because of its low parallelism and low proportion of the total time, the De-quantization/inverse transform, Intra prediction, Deblocking filter and Sample adaptive offset are operated on GPU, because of its high parallelism. Particularly to Intra prediction, in order to the satisfy data dependencies between reconstruction frame, the wave front algorithm is applied on Intra prediction module. For all the GPU modules, the data structure which is suited for GPU memory structure is designed to reduce the unnecessary data transmission.The experimental result shows that, the decoder based on the proposed parallelization algorithm can satisfied the hard real time requirement when it handle the 720p(720*1280) video.
Keywords/Search Tags:HEVC/H.265, real time decoding, GPU accelerate, Heterogenous processor on chip
PDF Full Text Request
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