| HEVC is an international standard for next-generation video compression.Compared with the H.264/AVC standard,it can greatly improve the coding efficiency while ensuring the same level of video transmission quality.At the same time,HEVC is born for parallel,and encodes and decodes ultra-high definition video.The field is more flexible than H.264/AVC.However,it brings about an increase in codec efficiency and also brings a huge complexity of encoding and decoding operations,which has become the biggest bottleneck for popularization and application.In this thesis,the multi-core processor Tilera-GX36 is used as the hardware platform,and the parallel optimization of HEVC decoding algorithm and the parallel decoding technology of multi-channel video stream are studied respectively.The main work and innovation of the thesis are as follows:1.The wavefront parallel algorithm based on CTU unit in the decoding process is studied and implemented.Based on the dependency analysis between CTU units,the wavefront parallel algorithm based on CTU unit is realized,which improves the decoding frame rate and parallel acceleration ratio while ensuring the reconstructed image quality.And to some extent,it solves the local computing complexity overload of ultra high definition video stream frame image.2.The fast fusion loop filtering algorithm of deep coupled DF and SAO is studied and implemented.The data between the DF module in the HEVC decoding frame is deblocked,the chrominance component deblocking filtering and the SAO sample adaptive compensation are used.Dependency pair analysis,deep coupled DF deblocking filtering and sample adaptive compensation SAO,propose a fast fusion loop filtering algorithm.Compared with the previous mainstream decoding algorithm,we found that the fast fusion loop filtering algorithm reduces the interaction between the core and the cache and improves the decoding efficiency.3.The parallel high-speed decoding scheduling algorithm of multi-channel video stream based on Tilera-GX36 integrated many-core platform is studied and implemented.For the Tilera-GX36many-core platform,we propose a cross-parallel sub-pixel interpolation decoding algorithm and optimize it using SSE2 instruction set.Fast cross-parallel sub-pixel interpolation optimization is implemented.Firstly,by studying the horizontal sub-pixel interpolation and vertical sub-pixel interpolation process,the cross-parallel sub-pixel interpolation optimization is proposed and optimized by SSE2 instruction set.Based on this,we design a multi-channel parallel scheduling algorithm and implement it.The real-time parallel high-speed decoding of the two-wayhigh-definition video maximizes the decoding efficiency of the multi-core processing platform.In this thesis,we proposes a wavefront parallel algorithm based on CTU unit,a fast fusion loop filtering algorithm based on CTU unit,and an efficient parallel scheduling algorithm based on Tilera-GX36 integrated multi-core processing platform.Moreover,for each algorithm,this thesis designs a contrast experiment and compares the most mainstream algorithms.Experiments show that the wavefront parallel algorithm based on CTU unit has significantly improved compared with the mainstream OWF wavefront parallel algorithm,and the decoding time is reduced on average.9.9%.The fast fusion loop filtering algorithm based on CTU unit has a significant improvement in the decoding frame rate of the HEVC parallel decoding technology and the loop filtering algorithm based on the multi-core processor-based task level and data level.The QP is 32.In the case of 6cores,the decoding time was reduced by an average of 2.3%.The parallel high-speed decoding scheduling algorithm of multi-channel video stream based on Tilera-GX36 integrated multi-core platform can realize two-way real-time decoding of video stream without any parallel method on the encoding end.Finally,the thesis summarizes the current research work and looks forward to further research directions in the future. |
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