System Verification And Implementation Of Dual Interface NFC Chip

With the development of internet of things(IOT) and wearable intelligent equipment, NFC as a near field communication technology has been widely researched and applied, with the characteristics of its low cost and convenient communication method. NFC chip, which has serial interface and RF wireless interface, can effectively provide data for the embedded devices with NFC mobile terminal interaction medium, and also expand the application field of RFID.This paper take the dual interface NFC chip as the research object, based on the FPGA platform build a chip design verification system. By using this verification system have been verified and implemented the independently designed NFC circuit. These works are presented in this dissertation:(1) Integrated the serial interface in compatible with ISO/IEC14443 Type-A standard dual interface NFC chip’s architecture, and the internal module functions and data exchange model has been discussed.(2) Based on FPGA, designed and implemented a set of dual interface NFC chip prototype verification system, which included the FPGA digital logic unit, single-chip microcomputer serial port control, RF front-end chip and PC application instructions.(3) Customized a set of communication protocols between MCU and PC control end, which can be realized transformation and interaction of instruction, among PC, MCU and NFC. On this basis, developed the PC control software and the MCU executable program can automatically and efficiently achieve stimulation produced, validation results collected and the comparison analysis of positioning design errors.(4) Through the verification and tape-out, used the dual interface NFC chip and integrated Heart rate pulse sensor design and implements a set of heart rate acquisition system.Write the NFC mobile phone APP, and verify the acquisition system through the actual tests.The chip design verification platform based on FPGA,which have been designed in this paper,can improve the efficiency of chip verification and test coverage,and have strong portability.