The Research On A Real-time Processing System For Low-light-level Images

Compared with common visible light images, the SNR(signal to noise ratio), brightness and contrast ratio of low-light-level images are much lower. So it is very difficult to recognize the target in them. In this paper, we have done some research on the real-time processing system for low-light-level images, aiming to increase their SNR and contrast ratio.At first, the characteristics of low-light-level images are analyzed, in which processing methods based on signal frame are proved to be invalid. After the analysis on a lot of articles in relevant fields, the combinative algorithm of energy accumulation and histogram equalization is proposed in this paper. The former is used to raise SNR and the latter aims to improve the brightness and contrast ratio. The Matlab simulation results show that its SNR raises from 2.1dB to 11.5dB, the weber and root-mean-square contrast ratio rise from 0.6974 to 1.7501 and 7.6724 to 47.1904 respectively.Then the hardware platform is set up with Altera Stratix V 5SGSMD5H1F35C1 FPGA as the core component. The algorithm design in FPGA starts from two main submodules. The energy accumulation module utilizes multiple RAM chips instead of one signal chip and we explain why. As for the histogram equalization, three improvements are presented. After that, the whole design is completed with the combination of schematic diagram input technology and hardware description language(HDL) input technology.At last the processing system proves to be real-time by Modelsim simulation and experiments. Furthermore, with the system’s help, the output image SNR of BG0631 MCCD raises from 2.1dB to 11.2dB, the weber and root-mean-square contrast ratio improve from 0.6974 to 1.6732 and 7.6724 to 45.8328 respectively. It shows that this real-time processing system is very effective.