Study And Design On Integrated Circuit Of Bioelectrical Signal Encryption And Watermark Embed

Aiming at practical application of biomedical engineering and based on the intersection of bioscience and information science, this paper studies biomedical signal processing with an emphasis on biomedical signal processing algorithm and realization of its application specific integrated circuit design.With the rapid development of communication technology and biomedical signal acquisition, data transmission and sharing of bioelectrical signal sensors become quite convenient. However, it also introduces the unsafe factors. In recent years, as people gradually increase awareness of personal information security, biomedical information security problems have appeared more in research and design.In this paper, it studies and proposes a design for bioelectrical signals AES(Advanced Encryption Standard) encryption and LSB(Least Significant Bit) digital watermark embedding application-specific integrated circuit used in portable or implantable biomedical signal recording system. The work is summarized as follows:(1) Propose an AES hardware implementation scheme for biological signal processing system. The scheme used the low-level basic logic gate and multiple reuse method to achieve a small area and meet the need of 128-channel sampling. On one hand, it solved the problem of AES encryption hardware implementation with high throughput and high clock frequency which consumed large area. On the other hand, it solved the problem of AES encryption hardware implementation with low clock frequency which was not enough to achieve 128-channel sampling.(2) Propose a solution to combine the hardware implementation of AES encryption and LSB watermarking embedding for bioelectrical signal processing system. In traditional designs, for both hardware and software realizations, they executed encryption and digital watermarking embedded in serial process. In this paper, it used an appropriate entry point to realize the LSB watermark embedding within AES encryption process. Compared with pure AES encryption process, this scheme could enhance the safety performance with no need to take additional clock cycle.This ASIC design was implemented in 0.18μm CMOS technology and it achieved a total cell number of 7.3K, core area of 259μm×402μm, clock frequency of 5MHz,power consumption of 492μW. The proposed design had solved the unsafe problem of wireless biomedical recording system, had the advantage of small area, and was able to reach 128-channal sampling with relative high clock frequency in body electrical signal acquisition system.