Testability Design Of Programmable Logic Device And Construction Of Verification Platform

With the rapid development of IC design and processing technology, electronic systems are becoming increasingly complex in this high-speed highly integrated circuit design. It requires higher requirements for testability design. Meanwhile, more and more circuit system designs use FPGA and CPLD to achieve rapid development. However there doesn’t have a design for testability method for such peogrammable logic device. Therefore a design for testability method based on instrumentation technology and multi-signal model technology is introduced to complete the design for testability of the logic code. Meanwhile, design a data acquisition card as verification platform. Main conributions in this paper are as follows:Firstly, design and realization of PCI data acquisition card. This paper designed a dual channel PCI data acquisition card with 12-bit and 10 MSps acquisition rates. The design of PCI data acquisition card is described, including the design and implementation of the hardware logic code which in the FPGA and CPLD. Complete the top software of data acquisition card with PLX_SDK.Secondly, implementation of the design for testability method with code instrumentation technology and multi-signal model technology. To achieve the fault diagnosis and model technology to build the fault information model and optimize the instrumentation points, realizing the design for testability of the logic code.Finally, verify the data acquisition card and testability design method. To verify data collection function of the PCI data acquisition card, a collect example is carried out. Then the feasibility of design for testability method is validated on PCI data acquisition card.