FPGA Architecture Implementation Of The SIFT Algorithm

As important parts of the image processing, local feature extraction and feature matching have been widely applied to spectral analysis, environment monitoring, landscape planning, weather detecting, super resolution image scale building, etc. And also the further improvement of the related algorithm in the image processing researching field has been achieved. The aim of this paper is to study the SIFT algorithm which based on related local characteristics theory, and design the implementation of the FPAG general parallel architecture.This paper first give a brief introduction to the SIFT image processing algorithm. The introduction mainly includes the theories of the scale space, spot detection, edge detection, corner detection, etc. This paper expounds the basic idea of these theories, and also analyzes some specific examples. This paper focus on the design of SIFT image local feature extraction and matching modules architecture which are based on the FPGA chips.The whole design could be divided into three parts-the design of Gaussian scale space construction, the design of key point exactly locating and the design of key point description and matching. Among them, the Gaussian scale-space construction module includes the image two-dimensional Gaussian filter module and the differential module.The two-dimensional Gaussian kernel filter module designed by using two one-dimension Gaussian filters-the row filter and the column filter.Key point locating design mainly contains the key point detection module, the exactly positioning module, the low contrast detection and the edge response detection module, etc. This part of the design uses many digital processing algorithms to deal with complex matrix inversion, root operation, arctan function, etc. and these means also achieve the purpose of the fast speed and the minimum resource consumption. Key point description design mainly contains vector calculation module, which uses the interpolation arithmetic to calculate the local feature invariant 128 feature vectors for each one. Matching design is mainly to compare two feature points with their 128 feature vectors using Euclidean distance comparison to find the points that satisfied with the matching condition.At the end of the architecture design, tests on structure function and timing simulationes for the whole system and each module are conducted based on Xilinx Virtex6 series chips. The system can correctly work in a variety of environmental for local feature extracting and matching.