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The Optimization And Realization Of Universal Recon Figurable Units In Heterogeneous Multicore Systems

Posted on:2016-07-17Degree:MasterType:Thesis
Country:ChinaCandidate:Y SunFull Text:PDF
GTID:2308330473454982Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
With the great development of multicore technology, multicore SoC is now widely used in data-intensive and compute-intensive fields. Compared to the homogeneous multicore systems, heterogeneous multicore systems can achieve better optimization of resources, which has a greater advantage when dealing with specific complex tasks. Heterogeneous multicore SoC integrates multiple types of specialized processors to better meet the data-intensive and compute-intensive applications, performance, area and power constraints, and is now becoming a new generation of mainstream semiconductor products. Heterogeneous multicore processor could assign different types of computing tasks to distinct kinds of processor cores for parallel processing, and achieve the task acceleration by heterogeneous computing unit, thereby providing a more flexible and efficient handling mechanism for different applications.Aiming at solving these problems, we carry out some relevant research on reconfigurable and heterogeneous multi-chip systems. We improve it on the basis of existing reconfigurable computing cluster, and further enhance its computational performance. The main thesis is as follows:Firstly, we optimize the reconfigurable unit and escalate the functions, retain their main computing models to improve the addressing method in storage mode, thus enriching the computing model. Based on board experiments, we can demonstrate that the improved reconfigurable unit has greater flexibility and efficiency.Secondly, on the basis of retention storage mode, we increase the stream computing model, to further enhance the effective time data calculated. We also increase the fixed-point computing power, making reconfigurable computing unit features a more general applicability. At the same time, in the system network, we make the local RCU achieve tightly coupled, so that system performance may be raised to some extent. The revised RCU supports dual data access, and the related experiments also prove that the new version of the RCU has higher computational efficiency.Finally, this thesis discusses the basic vector mapping, FFT, MUSIC algorithm, and then analyzes the system performance, therefore proving the performance advantages and practicality of the new system.
Keywords/Search Tags:Reconfigurable Computing, Parallel Computing, Heterogeneous multi-core, Algorithm Mapping, Dual Access
PDF Full Text Request
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